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Squelch trailing whitespace, including meta-whitespace

This commit is contained in:
Larry Doolittle 2018-03-10 09:59:06 -08:00 committed by Clifford Wolf
parent 82fecc98c0
commit efaef82f75
4 changed files with 16 additions and 16 deletions
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8
techlibs/achronix/speedster22i/cells_arith.v
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@ -45,10 +45,10 @@ module _80_altera_max10_alu (A, B, CI, BI, X, Y, CO);
//wire [Y_WIDTH:0] C = {CO, CI};
wire [Y_WIDTH+1:0] COx;
wire [Y_WIDTH+1:0] C = {COx, CI};
/* Start implementation */
(* keep *) fiftyfivenm_lcell_comb #(.lut_mask(16'b0000_0000_1010_1010), .sum_lutc_input("cin")) carry_start (.cout(COx[0]), .dataa(C[0]), .datab(1'b1), .datac(1'b1), .datad(1'b1));
genvar i;
generate for (i = 0; i < Y_WIDTH; i = i + 1) begin: slice
if(i==Y_WIDTH-1) begin
@ -61,5 +61,5 @@ module _80_altera_max10_alu (A, B, CI, BI, X, Y, CO);
endgenerate
/* End implementation */
assign X = AA ^ BB;
endmodule
endmodule

2
techlibs/achronix/speedster22i/cells_map.v
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@ -44,7 +44,7 @@ module \$_DFF_PN0_ (input D, C, R, output Q);
dffeas #(.is_wysiwyg(WYSIWYG)) _TECHMAP_REPLACE_ (.d(D), .q(Q), .clk(C), .clrn(R), .prn(1'b1), .ena(1'b1), .asdata(1'b0), .aload(1'b0), .sclr(1'b0), .sload(1'b0));
endmodule
/* */
module \$__DFFE_PP0 (input D, C, E, R, output Q);
module \$__DFFE_PP0 (input D, C, E, R, output Q);
parameter WYSIWYG="TRUE";
wire E_i = ~ E;
dffeas #(.is_wysiwyg(WYSIWYG)) _TECHMAP_REPLACE_ (.d(D), .q(Q), .clk(C), .clrn(R), .prn(1'b1), .ena(1'b1), .asdata(1'b0), .aload(1'b0), .sclr(E_i), .sload(1'b0));

6
techlibs/ice40/cells_sim.v
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@ -912,7 +912,7 @@ module SB_MAC16 (
output CO,
output ACCUMCO,
output SIGNEXTOUT
);
);
parameter NEG_TRIGGER = 1'b0;
parameter C_REG = 1'b0;
parameter A_REG = 1'b0;
@ -1030,7 +1030,7 @@ endmodule
(* blackbox *)
module SB_SPI (
input SBCLKI,
input SBRWI,
input SBRWI,
input SBSTBI,
input SBADRI7,
input SBADRI6,
@ -1125,7 +1125,7 @@ module SB_IO_I3C (
input D_OUT_1,
output D_IN_0,
output D_IN_1,
input PU_ENB,
input PU_ENB,
input WEAK_PU_ENB
);
parameter [5:0] PIN_TYPE = 6'b000000;

16
techlibs/xilinx/brams_init.py
View File

@ -2,27 +2,27 @@
with open("techlibs/xilinx/brams_init_18.vh", "w") as f:
for i in range(8):
init_snippets = ["INIT[%3d*9+8]" % (k+256*i,) for k in range(255, -1, -1)]
init_snippets = [" INIT[%3d*9+8]" % (k+256*i,) for k in range(255, -1, -1)]
for k in range(4, 256, 4):
init_snippets[k] = "\n " + init_snippets[k]
print(".INITP_%02X({%s})," % (i, ", ".join(init_snippets)), file=f)
print(".INITP_%02X({%s})," % (i, ",".join(init_snippets)), file=f)
for i in range(64):
init_snippets = ["INIT[%3d*9 +: 8]" % (k+32*i,) for k in range(31, -1, -1)]
init_snippets = [" INIT[%3d*9 +: 8]" % (k+32*i,) for k in range(31, -1, -1)]
for k in range(4, 32, 4):
init_snippets[k] = "\n " + init_snippets[k]
print(".INIT_%02X({%s})," % (i, ", ".join(init_snippets)), file=f)
print(".INIT_%02X({%s})," % (i, ",".join(init_snippets)), file=f)
with open("techlibs/xilinx/brams_init_36.vh", "w") as f:
for i in range(16):
init_snippets = ["INIT[%3d*9+8]" % (k+256*i,) for k in range(255, -1, -1)]
init_snippets = [" INIT[%3d*9+8]" % (k+256*i,) for k in range(255, -1, -1)]
for k in range(4, 256, 4):
init_snippets[k] = "\n " + init_snippets[k]
print(".INITP_%02X({%s})," % (i, ", ".join(init_snippets)), file=f)
print(".INITP_%02X({%s})," % (i, ",".join(init_snippets)), file=f)
for i in range(128):
init_snippets = ["INIT[%3d*9 +: 8]" % (k+32*i,) for k in range(31, -1, -1)]
init_snippets = [" INIT[%3d*9 +: 8]" % (k+32*i,) for k in range(31, -1, -1)]
for k in range(4, 32, 4):
init_snippets[k] = "\n " + init_snippets[k]
print(".INIT_%02X({%s})," % (i, ", ".join(init_snippets)), file=f)
print(".INIT_%02X({%s})," % (i, ",".join(init_snippets)), file=f)
with open("techlibs/xilinx/brams_init_16.vh", "w") as f:
for i in range(64):