George Rennie c6e8fb2432 optbarriers: add command to add/remove optimization barriers ... * This can optionally ignore rewriting the outputs of cells or processes * This by default rewrites drivers of wires with public names but can also optionally rewrite drivers of wires with private names * A -remove flag allows cleaning up the design by replacing barriers with connections		2024-11-20 18:57:51 +01:00
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cmds	optbarriers: add command to add/remove optimization barriers	2024-11-20 18:57:51 +01:00
equiv	equiv_simple: Take FFs into account for driver map	2024-02-21 12:05:52 +01:00
fsm	rtlil: represent Const strings as std::string	2024-10-14 06:28:12 +02:00
hierarchy	rtlil: represent Const strings as std::string	2024-10-14 06:28:12 +02:00
memory	rtlil: represent Const strings as std::string	2024-10-14 06:28:12 +02:00
opt	opt_merge: don't merge $barrier cells	2024-11-20 18:57:51 +01:00
pmgen	Merge pull request #4448 from georgerennie/shiftadd_gating	2024-11-20 13:34:09 +01:00
proc	proc_dff: fix early return bug	2024-11-07 00:06:03 +01:00
sat	Merge pull request #4525 from georgerennie/peepopt_clock_gate	2024-11-11 14:49:09 +01:00
techmap	flatten: add -barriers flag	2024-11-20 18:57:51 +01:00
tests	rtlil: represent Const strings as std::string	2024-10-14 06:28:12 +02:00