yosys/techlibs
Clifford Wolf 95944eb69e make all vector-size related integer params in $mem sim model signed
this fixes iverilog crashes such as the following:
warning: verinum::as_long() truncated 32 bits to 31, returns 2147483647
draw_net_input.c:711: Error: malloc() ran out of memory.
2015-04-05 17:26:53 +02:00
..
cmos Fixes in cmos_cells.v 2015-03-25 09:00:41 +01:00
common make all vector-size related integer params in $mem sim model signed 2015-04-05 17:26:53 +02:00
ice40 Added very first version of "synth_ice40" 2015-03-05 20:37:55 +01:00
xilinx Added "dffinit", Support for initialized Xilinx DFF 2015-04-04 19:00:15 +02:00
.gitignore added .gitignore files 2013-01-05 11:19:11 +01:00