yosys/tests
Marcin Kościelnicki a82e8df7d3 techmap: Add support for extracting init values of ports 2019-09-07 16:30:43 +02:00
..
aiger tests: use optional ABCEXTERNAL when specified 2019-06-27 23:00:13 -04:00
arch Add simcells.v, simlib.v, and some output 2019-06-27 11:13:49 -07:00
asicworld Fix FIRRTL to Verilog process instance subfield assignment. 2019-02-25 16:18:13 -08:00
bram Added support for (single-clock) transparent memories to bram tests 2016-11-01 10:03:13 +01:00
errors Rename the generic "Syntax error" message from the Verilog/SystemVerilog parser into unique, 2018-10-25 02:37:56 +03:00
fsm Speed up "make test" and related cleanups 2019-08-17 14:37:07 +02:00
hana Add optional SEED=n command line option to Makefile, and -S n command line option to test scripts, for deterministic regression tests. 2016-09-22 11:49:29 -06:00
ice40 Improve tests/ice40/macc.ys for SB_MAC16 2019-08-30 12:22:59 -07:00
liberty Liberty file parser now accepts superfluous ; 2019-03-27 15:16:19 +01:00
lut Forgot to commit 2019-07-16 12:44:26 -07:00
memories memory_dff: Fix checking of feedback mux input when more than one mux 2019-07-02 13:35:50 +01:00
opt Add missing -assert to equiv_opt 2019-09-06 22:51:44 -07:00
opt_share Support various binary operators in opt_share 2019-08-04 19:06:38 +02:00
proc proc_clean: fix order of switch insertion. 2019-08-19 16:44:23 +00:00
realmath Add optional SEED=n command line option to Makefile, and -S n command line option to test scripts, for deterministic regression tests. 2016-09-22 11:49:29 -06:00
sat Revert to using clean 2019-08-27 09:24:32 -07:00
share Add optional SEED=n command line option to Makefile, and -S n command line option to test scripts, for deterministic regression tests. 2016-09-22 11:49:29 -06:00
simple Use `command -v` rather than `which` 2019-09-03 00:57:32 +01:00
simple_abc9 Use `command -v` rather than `which` 2019-09-03 00:57:32 +01:00
smv Progress in SMV back-end 2015-06-19 14:08:46 +02:00
sva Fix "verific -extnets" for more complex situations 2019-03-26 14:17:46 +01:00
svinterfaces Fix typo in tests/svinterfaces/runone.sh 2019-05-03 14:40:51 +02:00
techmap techmap: Add support for extracting init values of ports 2019-09-07 16:30:43 +02:00
tools autotest.sh to define _AUTOTB when test_autotb 2019-06-28 14:56:22 -07:00
unit Build hotfix in tests/unit/Makefile 2016-12-11 10:58:49 +01:00
various Merge remote-tracking branch 'origin/master' into xaig_arrival 2019-09-04 15:36:07 -07:00
vloghtb bugfix in blif front-end 2015-05-18 11:15:49 +02:00
xilinx Add .gitignore 2019-08-28 09:55:34 -07:00