yosys/passes
Clifford Wolf add2d415fc
Merge pull request #1130 from YosysHQ/eddie/fix710
memory_dff: walk through more than one mux for computing read enable
2019-06-25 17:34:44 +02:00
..
cmds Fix typo, fixes #1095 2019-06-20 15:34:52 +02:00
equiv Add -undef option to equiv_opt, passed to equiv_induct 2019-04-26 11:16:48 -07:00
fsm fsm_opt: Fix runtime error for FSMs without a reset state 2019-02-07 10:35:36 +00:00
hierarchy Use input default values in hierarchy pass 2019-06-19 11:49:20 +02:00
memory Fix spacing 2019-06-25 08:33:17 -07:00
opt Cope with $reduce_or common in case 2019-06-21 12:31:14 -07:00
pmgen Do not use shiftmul peepopt pattern when mul result is truncated, fixes #1047 2019-05-28 17:17:56 +02:00
proc Improve proc full_case detection and handling, fixes #931 2019-04-18 15:13:47 +02:00
sat Add a few more filename rewrites 2019-06-20 10:27:59 -07:00
techmap Merge pull request #1108 from YosysHQ/clifford/fix1091 2019-06-21 17:13:41 -07:00
tests flowmap: implement depth relaxation. 2019-01-08 01:13:05 +00:00