eshellko 9a742f4069 Added 'assert-limit' option for 'select' command ... For resource limited designs such as FPGA it can be useful to specify limit of specific resources available on board. So user can check if he should change RTL as early as mapping done.		2016-07-01 10:24:22 +04:00
..
cmds	Added 'assert-limit' option for 'select' command	2016-07-01 10:24:22 +04:00
equiv	Added "yosys -D" feature	2016-04-21 23:28:37 +02:00
fsm	Added "yosys -D" feature	2016-04-21 23:28:37 +02:00
hierarchy	Made the expansion order of hierarchy deterministic	2016-05-22 16:41:26 +02:00
memory	Don't sign-extend memory bram initialization data	2016-05-15 00:05:30 +02:00
opt	Added opt_expr support for div/mod by power-of-two	2016-05-29 12:17:36 +02:00
proc	Added "proc_mux -ifx"	2016-06-06 17:15:50 +02:00
sat	Added "yosys -D" feature	2016-04-21 23:28:37 +02:00
techmap	Bugfix in "abc -script" handling	2016-06-19 22:19:19 +02:00
tests	Improved support for $sop cells	2016-06-17 16:31:16 +02:00