yosys/passes
Clifford Wolf 96e821dc6c Various improvements regarding logic loops in "share" results 2014-09-21 19:36:56 +02:00
..
abc Small improvements in "abc" command handle_loops() function 2014-09-19 14:05:41 +02:00
cmds Alphabetically sort port names in "show" output 2014-09-19 11:13:10 +02:00
fsm Corrected spelling mistakes found by lintian 2014-09-06 08:47:06 +02:00
hierarchy Corrected spelling mistakes found by lintian 2014-09-06 08:47:06 +02:00
memory Fixed $memwr/$memrd order in memory_dff 2014-09-16 12:40:58 +02:00
opt Various improvements regarding logic loops in "share" results 2014-09-21 19:36:56 +02:00
proc Fixed handling of constant-true branches in proc_clean 2014-08-12 17:35:22 +02:00
sat Corrected spelling mistakes found by lintian 2014-09-06 08:47:06 +02:00
techmap More aggressive $macc merging in alumacc 2014-09-15 12:42:11 +02:00
tests Added "test_abcloop" command 2014-09-19 15:51:34 +02:00