mirror of https://github.com/YosysHQ/yosys.git
Fixed handling of constant-true branches in proc_clean
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1dd8252169
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9d353fc543
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@ -59,7 +59,8 @@ void proc_clean_switch(RTLIL::SwitchRule *sw, RTLIL::CaseRule *parent, bool &did
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sw->signal = RTLIL::SigSpec();
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}
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if (sw->cases.size() == 1 && (sw->signal.size() == 0 || sw->cases[0]->compare.empty()))
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if (parent->switches.front() == sw && sw->cases.size() == 1 &&
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(sw->signal.size() == 0 || sw->cases[0]->compare.empty()))
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{
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did_something = true;
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for (auto &action : sw->cases[0]->actions)
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@ -31,7 +31,7 @@ static void proc_rmdead(RTLIL::SwitchRule *sw, int &counter)
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for (size_t i = 0; i < sw->cases.size(); i++)
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{
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bool is_default = sw->cases[i]->compare.size() == 0 && !pool.empty();
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bool is_default = SIZE(sw->cases[i]->compare) == 0 && (!pool.empty() || SIZE(sw->signal) == 0);
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for (size_t j = 0; j < sw->cases[i]->compare.size(); j++) {
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RTLIL::SigSpec sig = sw->cases[i]->compare[j];
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