Clifford Wolf 7f755dec75 Fixed bug in parsing real constants		2016-08-06 13:16:23 +02:00
..
.gitignore	Updated .gitignore file for ilang and verilog frontends	2014-10-15 01:14:38 +02:00
Makefile.inc	Adjust makefiles to work with out-of-tree builds	2015-08-12 15:04:44 +02:00
const2ast.cc	Fixed segfault on invalid verilog constant 1'b_	2015-09-22 08:13:09 +02:00
preproc.cc	SystemVerilog also has assume(), added implicit -D FORMAL	2015-10-13 14:21:20 +02:00
verilog_frontend.cc	Added "read_verilog -dump_rtlil"	2016-07-27 15:40:17 +02:00
verilog_frontend.h	No tristate warning message for "read_verilog -lib"	2016-07-23 11:56:53 +02:00
verilog_lexer.l	After reading the SV spec, using non-standard predict() instead of expect()	2016-07-21 13:34:33 +02:00
verilog_parser.y	Fixed bug in parsing real constants	2016-08-06 13:16:23 +02:00