yosys/passes/opt
Jannis Harder e36c71b5b7 Use clk2fflogic attr on cells to track original FF names in witnesses
This makes clk2fflogic add an attr to $ff cells that carry the state of
the emulated async FF. The $ff output doesn't have any async updates
that happened in the current cycle, but the $ff input does, so the $ff
input corresponds to the async FF's output in the original design.

Hence this patch also makes the following changes to passes besides
clk2fflogic (but only for FFs with the clk2fflogic attr set):

  * opt_clean treats the input as a register name (instead of the
    output)

  * rename -witness ensures that the input has a public name

  * the formal backends (smt2, btor, aiger) will use the input's
    name for the initial state of the FF in witness files

  * when sim reads a yw witness that assigns an initial value to the
    input signal, the state update is redirected to the output

This ensures that yosys witness files for clk2fflogic designs have
useful and stable public signal names. It also makes it possible to
simulate a clk2fflogic witness on the original design (with some
limitations when the original design is already using $ff cells).

It might seem like setting the output of a clk2fflogic FF to update the
input's initial value might not work in general, but it works fine for
these reasons:

  * Witnesses for FFs are only present in the initial cycle, so we do
    not care about any later cycles.

  * The logic that clk2fflogic generates loops the output of the
    genreated FF back to the input, with muxes in between to apply any
    edge or level sensitive updates. So when there are no active updates
    in the current gclk cycle, there is a combinational path from the
    output back to the input.

  * The logic clk2fflogic generates makes sure that an edge sensitive
    update cannot be active in the first cycle (i.e. the past initial
    value is assumed to be whatever it needs to be to avoid an edge).

  * When a level sensitive update is active in the first gclk cycle, it
    is actively driving the output for the whole gclk cycle, so ignoring
    any witness initialization is the correct behavior.
2023-05-25 12:48:02 +02:00
..
Makefile.inc Add opt_ffinv pass. 2022-05-13 23:02:30 +02:00
muxpack.cc Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
opt.cc opt_merge: Add `-keepdc` option required for formal verification 2022-04-01 21:03:20 +02:00
opt_clean.cc Use clk2fflogic attr on cells to track original FF names in witnesses 2023-05-25 12:48:02 +02:00
opt_demorgan.cc Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
opt_dff.cc Fitting help messages to 80 character width 2022-08-24 10:40:57 +12:00
opt_expr.cc opt_expr: Optimizations for `$bweqx` and `$bwmux` 2022-11-30 18:50:53 +01:00
opt_ffinv.cc Fixes for some of clang scan-build detected issues 2023-01-17 12:58:08 +01:00
opt_lut.cc opt_lut: Allow more than one -dlogic per cell type. 2021-07-29 17:30:07 +02:00
opt_lut_ins.cc gowin: widelut support (#3042) 2021-11-06 16:09:30 +01:00
opt_mem.cc opt_mem: Remove constant-value bit lanes. 2022-05-07 23:13:16 +02:00
opt_mem_feedback.cc kernel/mem: Introduce transparency masks. 2021-08-11 00:04:16 +02:00
opt_mem_priority.cc opt_mem_priority: Fix non-ascii char in help message. 2021-12-09 00:56:14 +01:00
opt_mem_widen.cc Add opt_mem_widen pass. 2021-08-14 01:06:23 +02:00
opt_merge.cc opt_merge: Add `-keepdc` option required for formal verification 2022-04-01 21:03:20 +02:00
opt_muxtree.cc opt_muxtree: Update port_off and port_idx even for constant bits 2021-06-11 12:06:35 +01:00
opt_reduce.cc opt_reduce: Fix use-after-free. 2022-07-23 17:27:26 +02:00
opt_share.cc Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
pmux2shiftx.cc Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
rmports.cc Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
share.cc Add v2 memory cells. 2021-08-11 13:34:10 +02:00
wreduce.cc wreduce: Keep more x-bits with -keepdc 2022-08-16 13:37:30 +02:00