yosys/passes
Miodrag Milanović 58b23954e8
Merge pull request #3299 from YosysHQ/mmicko/sim_memory
sim pass: support for memories
2022-05-09 09:28:09 +02:00
..
cmds show: Fix width labels. 2022-04-04 22:48:09 +02:00
equiv Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
fsm Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
hierarchy Reorder steps in -auto-top to fix synth command, fixes #3261 2022-04-05 14:02:37 +02:00
memory memory_share: fix wrong argidx in extra_args 2022-05-05 16:58:39 +08:00
opt opt_mem: Remove constant-value bit lanes. 2022-05-07 23:13:16 +02:00
pmgen Update comment 2022-02-02 03:21:09 +01:00
proc proc_dff: Emit $aldff. 2021-10-27 14:14:24 +02:00
sat fix crash when no fst input 2022-05-04 11:21:39 +02:00
techmap abc: Use dict/pool instead of std::map/std::set 2022-05-04 22:04:50 +02:00
tests Add $bmux and $demux cells. 2022-01-28 23:34:41 +01:00