yosys/passes
Clifford Wolf 7b02a44efb Fixed/improved opt_const $eq/$ne/$eqx/$nex handling 2013-12-27 14:21:24 +01:00
..
abc Tighter integration of ABC build 2013-11-27 09:08:35 +01:00
cmds Replaced RTLIL::Const::str with generic decoder method 2013-12-04 14:14:05 +01:00
extract Added support for non-const === and !== (for miter circuits) 2013-12-27 14:20:15 +01:00
fsm Fixes in fsm detect/extract for better detection of non-fsm circuits 2013-12-06 12:53:20 +01:00
hierarchy Replaced signed_parameters API with CONST_FLAG_SIGNED 2013-12-04 14:24:44 +01:00
memory Replaced RTLIL::Const::str with generic decoder method 2013-12-04 14:14:05 +01:00
opt Fixed/improved opt_const $eq/$ne/$eqx/$nex handling 2013-12-27 14:21:24 +01:00
proc Added support for non-const === and !== (for miter circuits) 2013-12-27 14:20:15 +01:00
sat Added sat -set-def/-set-*-undef support 2013-12-27 13:27:21 +01:00
scc fixed typos 2013-03-18 07:28:31 +01:00
submod Replaced RTLIL::Const::str with generic decoder method 2013-12-04 14:14:05 +01:00
techmap Fixed dfflibmap for unused output ports 2013-12-21 20:47:22 +01:00