Clifford Wolf 012c6af088 Allow $specify[23] cells in blackbox modules ... Signed-off-by: Clifford Wolf <clifford@clifford.at>		2019-04-23 21:36:59 +02:00
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Makefile.inc	Added Verilog/AST support for DPI functions (dpi_call() still unimplemented)	2014-08-21 12:43:51 +02:00
ast.cc	Allow $specify[23] cells in blackbox modules	2019-04-23 21:36:59 +02:00
ast.h	New behavior for front-end handling of whiteboxes	2019-04-20 22:24:50 +02:00
dpicall.cc	Fixed trailing whitespaces	2015-07-02 11:14:30 +02:00
genrtlil.cc	Checking and fixing specify cells in genRTLIL	2019-04-23 21:36:59 +02:00
simplify.cc	Determine correct signedness and expression width in for loop unrolling, fixes #370	2019-04-22 18:19:02 +02:00