yosys/passes
Clifford Wolf d176e613c2 Minor fixes in handling of "init" attribute 2015-04-09 15:12:26 +02:00
..
abc Added $_MUX4_, $_MUX8_, and $_MUX16_ cell types 2015-04-05 09:45:14 +02:00
cmds Added support for "file names with blanks" 2015-04-08 12:14:34 +02:00
equiv Replaced ezDefaultSAT with ezSatPtr 2015-02-21 12:15:41 +01:00
fsm Added onehot attribute 2015-02-04 18:52:54 +01:00
hierarchy Added "dffinit", Support for initialized Xilinx DFF 2015-04-04 19:00:15 +02:00
memory Added support for "file names with blanks" 2015-04-08 12:14:34 +02:00
opt Added non-std verilog assume() statement 2015-02-26 18:47:39 +01:00
proc Minor fixes in handling of "init" attribute 2015-04-09 15:12:26 +02:00
sat Added non-std verilog assume() statement 2015-02-26 18:47:39 +01:00
techmap techmap code cleanup 2015-04-09 12:02:26 +02:00
tests Replaced ezDefaultSAT with ezSatPtr 2015-02-21 12:15:41 +01:00