dh73 c27dcc1e47 Add initial support for both MAX10 and Cyclone IV (E|GX) FPGAs		2017-04-05 23:01:29 -05:00
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altera_intel	Add initial support for both MAX10 and Cyclone IV (E|GX) FPGAs	2017-04-05 23:01:29 -05:00
common	Add $live and $fair cell types, add support for s_eventually keyword	2017-02-25 10:36:39 +01:00
gowin	Indenting fixes in gowin sim cell lib	2016-11-08 18:54:00 +01:00
greenpak4	Merge https://github.com/cliffordwolf/yosys	2017-02-14 08:29:37 -08:00
ice40	iCE40 flow is not experimental anymore	2016-11-01 11:32:02 +01:00
xilinx	Added "yosys -D" feature	2016-04-21 23:28:37 +02:00
.gitignore	added .gitignore files	2013-01-05 11:19:11 +01:00