yosys/techlibs
Clifford Wolf 3481f46d1e Improved xilinx "bram1" test 2015-04-09 17:12:12 +02:00
..
cmos Fixes in cmos_cells.v 2015-03-25 09:00:41 +01:00
common make all vector-size related integer params in $mem sim model signed 2015-04-05 17:26:53 +02:00
ice40 Added very first version of "synth_ice40" 2015-03-05 20:37:55 +01:00
xilinx Improved xilinx "bram1" test 2015-04-09 17:12:12 +02:00
.gitignore added .gitignore files 2013-01-05 11:19:11 +01:00