yosys/passes
Clifford Wolf 27a1bfbec6 Fixes in old SAT example.ys 2014-09-01 11:45:47 +02:00
..
abc Added additional gate types: $_NAND_ $_NOR_ $_XNOR_ $_AOI3_ $_OAI3_ $_AOI4_ $_OAI4_ 2014-08-16 18:29:39 +02:00
cmds Moved "share" and "wreduce" to passes/opt/ 2014-09-01 11:45:26 +02:00
fsm Don't change existing binary FSM encoding if it is already optimal 2014-08-30 14:43:06 +02:00
hierarchy Added module->ports 2014-08-14 16:22:52 +02:00
memory Improved write address decoder generation memory_map 2014-08-30 18:18:15 +02:00
opt Moved "share" and "wreduce" to passes/opt/ 2014-09-01 11:45:26 +02:00
proc Fixed handling of constant-true branches in proc_clean 2014-08-12 17:35:22 +02:00
sat Fixes in old SAT example.ys 2014-09-01 11:45:47 +02:00
techmap Fixed inserting of Q-inverters in dfflibmap 2014-08-27 19:44:12 +02:00
tests Added eval testing to test_cell 2014-08-31 18:08:42 +02:00