yosys/passes
Clifford Wolf 665eec3d53 Removed $timescale from "sat" command VCD writer
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-03-29 12:38:41 +02:00
..
cmds Add "setundef -undef" 2018-03-12 13:52:35 +01:00
equiv Improve log messages in equiv_make 2018-01-19 16:20:40 +01:00
fsm Remove some dead code from fsm_map 2017-08-21 15:02:16 +02:00
hierarchy Chenged "extensions_map" to "extensions_list" in hierarchy.cc 2018-03-27 14:12:57 +02:00
memory Add "memory_nordff" pass 2018-03-06 23:31:51 +01:00
opt Fix opt_rmdff handling of $dlatchsr 2018-02-26 11:46:05 +01:00
proc Add warnings for driver-driver conflicts between FFs (and other cells) and constants 2017-12-12 17:13:27 +01:00
sat Removed $timescale from "sat" command VCD writer 2018-03-29 12:38:41 +02:00
techmap Fix handling of src attributes in flatten 2018-03-10 13:55:30 +01:00
tests Add $live and $fair cell types, add support for s_eventually keyword 2017-02-25 10:36:39 +01:00