mirror of https://github.com/YosysHQ/yosys.git
Remove some dead code from fsm_map
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@ -274,9 +274,6 @@ static void map_fsm(RTLIL::Cell *fsm_cell, RTLIL::Module *module)
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{
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RTLIL::SigSpec sig_a(RTLIL::State::Sx, next_state_wire->width);
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RTLIL::SigSpec sig_b, sig_s;
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int reset_state = fsm_data.reset_state;
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if (reset_state < 0)
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reset_state = 0;
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for (size_t i = 0; i < fsm_data.state_table.size(); i++) {
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RTLIL::Const state = fsm_data.state_table[i];
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