achronix
|
Organizing Speedster file names
|
2017-11-08 20:23:55 -06:00 |
common
|
Fix minor typo in "prep" help message
|
2017-12-19 21:44:05 +01:00 |
easic
|
Add first draft of eASIC back-end
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2017-09-29 17:53:43 +02:00 |
gowin
|
Indenting fixes in gowin sim cell lib
|
2016-11-08 18:54:00 +01:00 |
ice40
|
Fix port names in SB_IO_OD
|
2017-12-10 15:33:38 +00:00 |
intel
|
Add "dffinit -highlow" and fix synth_intel
|
2018-01-09 18:42:19 +01:00 |
xilinx
|
Add techlibs/xilinx/lut2lut.v
|
2017-07-10 12:09:05 +02:00 |
.gitignore
|
added .gitignore files
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2013-01-05 11:19:11 +01:00 |