12 Commits

Author	SHA1	Message	Date
Pepijn de Vos	8ab412eb16	Remove dff init altogether ... The hardware does not actually support it. In reality it is always initialised to its reset value.	2019-11-19 15:53:44 +01:00
Pepijn de Vos	ab8c521030	fix fsm test with proper clock enable polarity	2019-11-11 17:51:26 +01:00
Pepijn de Vos	0e5dbc4abc	fix wide luts	2019-11-06 19:48:18 +01:00
Pepijn de Vos	f88335a8a5	add wide luts	2019-10-28 12:49:08 +01:00
Pepijn de Vos	03457ee13e	add a few more missing dff	2019-10-21 16:08:13 +02:00
Pepijn de Vos	8a2699c40c	add negedge DFF	2019-10-21 12:31:11 +02:00
Pepijn de Vos	2fb20f184a	Revert "add MUX support" ... It turns out that they make everything worse and they don't PnR. This reverts commit 3eff2271d0.	2019-09-06 11:28:17 +02:00
Pepijn de Vos	1b9f7f49b5	add more DFF to sim lib	2019-09-06 09:01:07 +02:00
Pepijn de Vos	5168b6ffa4	WIP aditional DFF primitives	2019-09-05 19:12:47 +02:00
Pepijn de Vos	3eff2271d0	add MUX support	2019-09-05 13:36:41 +02:00
Diego	f9272fc56d	GoWin enablement: DRAM, initial BRAM, DRAM init, DRAM sim and synth_gowin flow	2019-04-12 23:40:02 -05:00
Clifford Wolf	cae5131bac	Added initial version of "synth_gowin"	2016-11-01 11:31:13 +01:00