yosys

Author	SHA1	Message	Date
Larry Doolittle	99706b3bf4	Squelch a little more trailing whitespace	2018-12-29 12:46:54 +01:00
Clifford Wolf	25e33d7ab8	Major redesign of Verific SVA importer Signed-off-by: Clifford Wolf <clifford@clifford.at>	2018-02-27 20:33:15 +01:00
Clifford Wolf	6d12c83d36	Add support for SVA throughout via Verific	2018-02-21 13:09:47 +01:00
Clifford Wolf	5c6247dfa6	Add support for SVA sequence concatenation ranges via verific Signed-off-by: Clifford Wolf <clifford@clifford.at>	2018-02-18 16:35:06 +01:00
Clifford Wolf	9d963cd29c	Add support for SVA until statements via Verific Signed-off-by: Clifford Wolf <clifford@clifford.at>	2018-02-18 14:57:52 +01:00
Clifford Wolf	bc8ab3ab44	Fix verific PRIM_SVA_AT handling in properties with PRIM_SVA_DISABLE_IFF	2018-02-15 15:26:37 +01:00
Clifford Wolf	baddb017fe	Remove PSL example from tests/sva/	2017-10-20 13:16:24 +02:00
Clifford Wolf	4cf890dac1	Add simple VHDL+PSL example	2017-07-28 17:39:43 +02:00
Clifford Wolf	c1cfca8f54	Improve Verific SVA importer	2017-07-27 14:05:09 +02:00
Clifford Wolf	877ff1f75e	Add counter.sv SVA test	2017-07-27 12:37:16 +02:00
Clifford Wolf	b24f737759	Improve SVA tests, add Makefile and scripts	2017-07-27 11:42:05 +02:00
Clifford Wolf	84f15260b5	Add more SVA test cases for future Verific work	2017-07-22 16:35:46 +02:00
Clifford Wolf	024ba310ec	Add some simple SVA test cases for future Verific work	2017-07-22 12:31:08 +02:00