mirror of https://github.com/YosysHQ/yosys.git
Improve Verific SVA importer
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@ -1275,6 +1275,40 @@ struct VerificSvaImporter
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return;
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}
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if (inst->Type() == PRIM_SVA_SEQ_CONCAT)
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{
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int sva_low = atoi(inst->GetAttValue("sva:low"));
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int sva_high = atoi(inst->GetAttValue("sva:low"));
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if (sva_low != sva_high)
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log_error("Ranges on SVA sequence concatenation operator are not supported at the moment.\n");
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parse_sequence(seq, inst->GetInput1());
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for (int i = 0; i < sva_low; i++)
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sequence_ff(seq);
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parse_sequence(seq, inst->GetInput2());
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return;
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}
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if (inst->Type() == PRIM_SVA_CONSECUTIVE_REPEAT)
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{
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int sva_low = atoi(inst->GetAttValue("sva:low"));
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int sva_high = atoi(inst->GetAttValue("sva:low"));
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if (sva_low != sva_high)
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log_error("Ranges on SVA consecutive repeat operator are not supported at the moment.\n");
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parse_sequence(seq, inst->GetInput());
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for (int i = 1; i < sva_low; i++) {
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sequence_ff(seq);
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parse_sequence(seq, inst->GetInput());
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}
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return;
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}
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if (!importer->mode_keep)
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log_error("Unsupported Verific SVA primitive %s of type %s.\n", inst->Name(), inst->View()->Owner()->Name());
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log_warning("Unsupported Verific SVA primitive %s of type %s.\n", inst->Name(), inst->View()->Owner()->Name());
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@ -11,19 +11,20 @@ module top (input clk, reset, up, down, output reg [7:0] cnt);
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default clocking @(posedge clk); endclocking
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default disable iff (reset);
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assert property (up |=> cnt == $past(cnt) + 8'd1);
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// assert property (up [*2] |=> cnt == $past(cnt, 2) + 8'd2);
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// assert property (up ##1 up |=> cnt == $past(cnt, 2) + 8'd2);
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assert property (up |=> cnt == $past(cnt) + 8'd 1);
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assert property (up [*2] |=> cnt == $past(cnt, 2) + 8'd 2);
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assert property (up ##1 up |=> cnt == $past(cnt, 2) + 8'd 2);
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`ifndef FAIL
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assume property (down |-> !up);
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`endif
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assert property (down |=> cnt == $past(cnt) - 8'd1);
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assert property (up ##1 down |=> cnt == $past(cnt, 2));
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assert property (down |=> cnt == $past(cnt) - 8'd 1);
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property down_n(n);
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down [*n] |=> cnt == $past(cnt, n) + n;
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down [*n] |=> cnt == $past(cnt, n) - n;
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endproperty
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// assert property (down_n(3));
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// assert property (down_n(5));
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assert property (down_n(8'd 3));
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assert property (down_n(8'd 5));
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endmodule
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