Commit Graph

1429 Commits

Author SHA1 Message Date
Miodrag Milanovic 44705102b5 Better error for unsupported SVA sequence 2020-09-18 17:08:00 +02:00
clairexen f176bd7778
Merge pull request #2329 from antmicro/arrays-fix-multirange-size
Rewrite multirange arrays sizes [n] as [n-1:0]
2020-09-17 18:27:05 +02:00
clairexen 9e937961dc
Merge pull request #2330 from antmicro/arrays-fix-multirange-access
Fix unsupported subarray access detection
2020-09-17 18:21:53 +02:00
Miodrag Milanovic 3f27a4ea68 Use latest verific 2020-09-02 10:22:25 +02:00
clairexen a10893072b
Merge pull request #2352 from zachjs/const-func-localparam
Allow localparams in constant functions
2020-09-01 17:31:48 +02:00
clairexen c1a6097376
Merge pull request #2366 from zachjs/library-format
Simple support for %l format specifier
2020-09-01 17:30:36 +02:00
clairexen 3e1840d036
Merge pull request #2353 from zachjs/top-scope
Module name scope support
2020-09-01 17:30:09 +02:00
clairexen 452442ac2f
Merge pull request #2365 from zachjs/const-arg-loop-split-type
Fix constant args used with function ports split across declarations
2020-09-01 17:28:35 +02:00
Miodrag Milanovic 04d5692a85 Reorder to prevent crash 2020-08-31 12:22:26 +02:00
Miodrag Milanovic 3af499c60f ast recognize lower case x and z and verific gives upper case 2020-08-30 13:33:03 +02:00
Miodrag Milanovic 2f93579bd1 Do not check for 1 and 0 only 2020-08-30 13:15:06 +02:00
Miodrag Milanovic b1e3bc059c Fix import of VHDL enums 2020-08-30 12:25:23 +02:00
Zachary Snow c7ceed3fd3 Simple support for %l format specifier
Yosys doesn't support libraries, so this provides the same behavior as
%m, as some other tools have opted to do.
2020-08-29 13:33:31 -04:00
Zachary Snow ecc5c23b4d Fix constant args used with function ports split across declarations 2020-08-29 13:31:02 -04:00
whitequark 00e7dec7f5 Replace "ILANG" with "RTLIL" everywhere.
The only difference between "RTLIL" and "ILANG" is that the latter is
the text representation of the former, as opposed to the in-memory
graph representation. This distinction serves no purpose but confuses
people: it is not obvious that the ILANG backend writes RTLIL graphs.

Passes `write_ilang` and `read_ilang` are provided as aliases to
`write_rtlil` and `read_rtlil` for compatibility.
2020-08-26 17:29:32 +00:00
Miodrag Milanovic fe8226a22d Add formal apps and template generators 2020-08-26 10:39:57 +02:00
Zachary Snow 6127f22788 Module name scope support 2020-08-20 20:15:08 -04:00
Zachary Snow 74abc3bbfd Allow localparams in constant functions 2020-08-20 20:10:24 -04:00
clairexen 87b9ee330d
Merge pull request #2122 from PeterCrozier/struct_array2
Support 2D bit arrays in structures. Optimise array indexing.
2020-08-19 17:58:37 +02:00
clairexen 22765ef0a5
Merge pull request #2339 from zachjs/display-format-0s
Allow %0s $display format specifier
2020-08-18 17:39:01 +02:00
clairexen 4aa0dc4dc7
Merge pull request #2338 from zachjs/const-branch-finish
Propagate const_fold through generate blocks and branches
2020-08-18 17:38:07 +02:00
clairexen a9681f4e06
Merge pull request #2317 from zachjs/expand-genblock
Fix generate scoping issues
2020-08-18 17:37:11 +02:00
Claire Wolf 7f767bf2b7 Merge branch 'const-func-block-var' of https://github.com/zachjs/yosys into zachjs-const-func-block-var
Signed-off-by: Claire Wolf <claire@symbioticeda.com>
2020-08-18 17:29:49 +02:00
clairexen 5ee9349647
Merge pull request #2281 from zachjs/const-real
Allow reals as constant function parameters
2020-08-18 17:22:20 +02:00
Zachary Snow 2ee0b8ebea Propagate const_fold through generate blocks and branches 2020-08-09 17:21:08 -04:00
Zachary Snow 96ec9acf84 Allow %0s $display format specifier 2020-08-09 17:19:49 -04:00
Lukasz Dalek ba08c25133 Fix subarray access condition
Signed-off-by: Lukasz Dalek <ldalek@antmicro.com>
2020-08-03 16:16:04 +02:00
Lukasz Dalek 83ddc62034 Rewrite multirange arrays sizes [n] as [n-1:0]
Signed-off-by: Lukasz Dalek <ldalek@antmicro.com>
2020-08-03 14:48:27 +02:00
Zachary Snow c3e95eb1ab Fix generate scoping issues
- expand_genblock defers prefixing of items within named sub-blocks
- Allow partially-qualified references to local scopes
- Handle shadowing within generate blocks
- Resolve generate scope references within tasks and functions
- Apply generate scoping to genvars
- Resolves #2214, resolves #1456
2020-07-31 20:32:47 -06:00
Miodrag Milanovic cc02d58194 Clear last error message 2020-07-29 15:28:33 +02:00
clairexen 45e96d5d87
Merge pull request #2301 from zachjs/for-loop-errors
Clearer for loop error messages
2020-07-28 14:07:26 +02:00
Zachary Snow 58da181af9 Clearer for loop error messages 2020-07-25 10:37:16 -06:00
Zachary Snow f69daf4830 Allow blocks with declarations within constant functions 2020-07-25 10:16:12 -06:00
Zachary Snow 59c4ad8ed3 Avoid generating wires for function args which are constant 2020-07-24 21:18:24 -06:00
Zachary Snow f285f7b769 Allow reals as constant function parameters 2020-07-19 20:27:09 -06:00
Claire Wolf 51ee0b683f Treat all bison warnings as errors in verilog front-end
Signed-off-by: Claire Wolf <claire@symbioticeda.com>
2020-07-15 11:57:31 +02:00
Claire Wolf 7a79843cc3 Use %precedence in verilog_parser.y
Signed-off-by: Claire Wolf <claire@symbioticeda.com>
2020-07-15 11:54:28 +02:00
Claire Wolf 24540291c7 Fix bison warnings for missing %empty
Signed-off-by: Claire Wolf <claire@symbioticeda.com>
2020-07-15 11:50:59 +02:00
Claire Wolf 1f4e452609 Run bison with -Wall for verilog front-end
Signed-off-by: Claire Wolf <claire@symbioticeda.com>
2020-07-15 11:49:36 +02:00
clairexen 021ce8e596
Merge pull request #2257 from antmicro/fix-conflicts
Restore #2203 and #2244 and fix parser conflicts
2020-07-15 11:49:09 +02:00
Kamil Rakoczy 02c071888b Add missing semicolons
Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
2020-07-15 10:15:13 +02:00
Claire Wolf f9ed09423e Add AST_EDGE support to AstNode::detect_latch(), fixes #2241
Signed-off-by: Claire Wolf <claire@symbioticeda.com>
2020-07-10 18:41:13 +02:00
Kamil Rakoczy d77b3305d8 Fix S/R conflicts
This commit fixes S/R conflicts introduced by commit 6f9be93.

Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
2020-07-10 15:03:53 +02:00
Kamil Rakoczy 0ffaddee5e Fix R/R conflicts
This commit fixes R/R conflicts introduced by commit 7e83a51.
Parameter logic is already defined as part of `param_range_type` rule.

Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
2020-07-10 15:03:01 +02:00
Kamil Rakoczy de649b9194 Revert "Revert PRs #2203 and #2244."
This reverts commit 9c120b89ac.
2020-07-10 09:59:48 +02:00
whitequark dc35ef05f9 verilog_parser: turn S/R and R/R conflicts into hard errors.
Fixes #2253.
2020-07-09 19:36:59 +00:00
whitequark 9c120b89ac Revert PRs #2203 and #2244.
This reverts commit 7e83a51fc9.
This reverts commit b422f2e4d0.
This reverts commit 7cb56f34b0.
This reverts commit 6f9be939bd.
This reverts commit 76a34dc5f3.
2020-07-09 19:36:32 +00:00
Lukasz Dalek 7e83a51fc9 Support logic typed parameters
Signed-off-by: Lukasz Dalek <ldalek@antmicro.com>
2020-07-06 09:18:48 +02:00
clairexen 3d8d98d709
Merge pull request #2132 from YosysHQ/eddie/verific_initial
verific: rewrite initial assume/asserts prior to elaboration
2020-07-02 17:50:22 +02:00
clairexen 7450ee7f8a
Merge pull request #2203 from antmicro/fix-grammar
Signed and macro grammar update
2020-07-01 16:41:32 +02:00