Commit Graph

5139 Commits

Author SHA1 Message Date
Henner Zeller 5e443a5d0d Fix two instances of integer-assignment to string.
o In cover.cc, the int-result of mkstemps() was assigned to a string
  and silently interpreted as a single-character filename with a funny
  value. Fix with the intent: assign the filename.
o in libparse.cc, an int was assigned to a string, but depending on
  visible constructors, this is ambiguous. Explicitly cast this to
  a char.
2019-05-14 22:01:15 -07:00
Henner Zeller 8eb2798776 Make the generated *.tab.hh include all the headers needed to define the union. 2019-05-14 21:07:26 -07:00
Stefan Biereigel c97c860303 extract python prefix to allow overriding 2019-05-14 15:28:03 +02:00
Stefan Biereigel 660e733bd2 remove ldconfig call 2019-05-14 14:49:40 +02:00
Stefan Biereigel 6c9c78d4aa add mkdir for libyosys target, explicitly copy to target folder 2019-05-14 14:36:31 +02:00
whitequark c8c1df23a0 bugpoint: check for -script option.
Fixes #925.
2019-05-14 10:48:06 +00:00
Sylvain Munaut 4f9183d107 ice40/cells_sim.v: Add support for TRIM input to SB_HFOSC
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2019-05-13 12:51:06 +02:00
Clifford Wolf 5772732a6d
Merge pull request #1004 from YosysHQ/clifford/fix1002
Fix handling of glob_abort_cnt in opt_muxtree
2019-05-12 15:33:53 +02:00
Clifford Wolf 8166a142dd Fix handling of glob_abort_cnt in opt_muxtree, fixes #1002
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-12 13:51:12 +02:00
Clifford Wolf faf00586d8
Merge pull request #1003 from makaimann/zinit-all
Zinit option '-singleton' -> '-all'
2019-05-11 13:56:51 +02:00
Clifford Wolf b66b657b6b Add "fmcombine -initeq -anyeq"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-11 09:28:55 +02:00
Clifford Wolf 04ef222cfb Add "stat -tech xilinx"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-11 09:24:52 +02:00
Makai Mann 2f5cfa014b Zinit option '-singleton' -> '-all' 2019-05-10 10:23:14 -07:00
Clifford Wolf 9b2b0d91d2
Merge pull request #1000 from bwidawsk/synth-format
Add clang format, and use on intel_synth (v2)
2019-05-09 18:41:38 +02:00
Ben Widawsky 05d8cc4567 Fix formatting for synth_intel.cc
This is realized through the recently added .clang-format file.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2019-05-09 08:40:05 -07:00
Ben Widawsky 02e7d931a7 Add a .clang-format
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2019-05-09 08:40:05 -07:00
Clifford Wolf 05a5027db8 Add $stop to documentation
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-09 15:31:40 +02:00
Jakob Wenzel f06cb75b93 initialize more registers in setundef -init 2019-05-09 12:47:16 +02:00
Clifford Wolf caad497839 Remove added newline (by re-running minisat 00_UPDATE.sh)
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-08 11:26:58 +02:00
Clifford Wolf 3870e7cf29
Merge pull request #991 from kristofferkoch/gcc9-warnings
Fix all warnings that occurred when compiling with gcc9
2019-05-08 11:25:22 +02:00
Kristoffer Ellersgaard Koch 30c762d3a1 Fix all warnings that occurred when compiling with gcc9 2019-05-08 10:27:14 +02:00
Clifford Wolf c582a25bdb
Merge pull request #998 from mdaiter/get_bool_attribute_opts
Minor optimization to get_attribute_bool
2019-05-08 08:34:35 +02:00
Matthew Daiter 6e629d2895 Minor optimization to get_attribute_bool 2019-05-07 22:04:28 -05:00
Clifford Wolf b7ec698d40 Add test case from #997
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-07 19:58:04 +02:00
Clifford Wolf 33738c1745 Fix handling of partial init attributes in write_verilog, fixes #997
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-07 19:55:36 +02:00
Clifford Wolf 0ee1759f00
Merge pull request #996 from mdaiter/ceil_log2_opts
Optimize ceil_log2 function
2019-05-07 19:46:27 +02:00
Matthew Daiter bafbb9ee90 Optimize ceil_log2 function 2019-05-07 12:17:56 -05:00
Clifford Wolf 09467bb9a3 Add "synth_xilinx -arch"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-07 15:04:36 +02:00
Clifford Wolf a76189e7ad More opt_clean cleanups
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-07 14:41:58 +02:00
Clifford Wolf 752553d8e9
Merge pull request #946 from YosysHQ/clifford/specify
Add specify parser
2019-05-06 20:57:15 +02:00
Clifford Wolf 1706798f4e
Merge pull request #975 from YosysHQ/clifford/fix968
Re-enable "final loop assignment" feature and fix opt_clean warnings
2019-05-06 20:53:38 +02:00
Clifford Wolf 7bab7b3d49
Merge pull request #871 from YosysHQ/verific_import
Improve verific -chparam and add hierarchy -chparam
2019-05-06 20:51:59 +02:00
Clifford Wolf d97c644bc1 Add tests/various/chparam.sh
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-06 16:03:15 +02:00
Clifford Wolf d187be39d6 Merge branch 'master' of github.com:YosysHQ/yosys into clifford/fix968 2019-05-06 15:41:13 +02:00
Clifford Wolf 20268d12a5 Fix the other bison warning in ilang_parser.y
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-06 15:38:43 +02:00
Clifford Wolf b37c31e2cb Bugfix in peepopt_shiftmul.pmg
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-06 15:34:19 +02:00
Clifford Wolf 3333e002b1
Merge pull request #992 from bwidawsk/bison-fix
verilog_parser: Fix Bison warning
2019-05-06 14:00:49 +02:00
Clifford Wolf c0782d8390
Merge pull request #989 from YosysHQ/dave/abc_name_improve
ABC name recovery fixes
2019-05-06 13:57:35 +02:00
Clifford Wolf f02e22a35a Fix bug in "expose -input"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-06 13:30:55 +02:00
Clifford Wolf ba6ce21a74 Cleanups in opt_clean
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-06 12:45:22 +02:00
Clifford Wolf 8c6e94d57c Improve tests/various/specify.ys
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-06 12:26:15 +02:00
Clifford Wolf 1cd1b5fc1a Add "real" keyword to ilang format
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-06 12:00:40 +02:00
Clifford Wolf c7f2e93024 Merge branch 'master' of github.com:YosysHQ/yosys into clifford/specify 2019-05-06 11:46:10 +02:00
Ben Widawsky a98069d762 verilog_parser: Fix Bison warning
As of Bison 2.6, name-prefix is deprecated. This fixes
frontends/verilog/verilog_parser.y:99.1-34: warning: deprecated directive, use ‘%define api.prefix {frontend_verilog_yy}’ [-Wdeprecated]
 %name-prefix "frontend_verilog_yy"

For details: https://www.gnu.org/software/bison/manual/html_node/Multiple-Parsers.html

Compile tested only.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2019-05-05 19:36:27 -07:00
Clifford Wolf 70d0f389ad
Merge pull request #988 from YosysHQ/clifford/fix987
Add approximate support for SV "var" keyword
2019-05-04 21:58:25 +02:00
David Shah a84256aa36 abc: Fix handling of postfixed names (e.g. for retiming)
Signed-off-by: David Shah <dave@ds0.me>
2019-05-04 17:23:44 +01:00
David Shah 5ce9113eda abc: Improve name recovery
Signed-off-by: David Shah <dave@ds0.me>
2019-05-04 16:53:25 +01:00
Clifford Wolf a01386c0e4 Improve opt_clean handling of unused wires
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-04 09:47:16 +02:00
Clifford Wolf 66d6ca2de2 Add support for SVA "final" keyword
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-04 09:25:32 +02:00
Clifford Wolf 87426f5a06 Improve write_verilog specify support
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-04 08:46:24 +02:00