Miodrag Milanovic
a6959d30df
Use edges when explicit
2022-01-31 09:38:25 +01:00
Miodrag Milanovic
cbadfa0268
Updating initial state and checks
2022-01-31 09:19:34 +01:00
Miodrag Milanovic
190e44f0da
Fix scope
2022-01-31 08:56:29 +01:00
Miodrag Milanovic
f04d1398e5
check if stop before start
2022-01-28 19:41:43 +01:00
Miodrag Milanovic
ecbba625c4
set initial state, only flip-flops
2022-01-28 15:59:13 +01:00
Miodrag Milanovic
cb12b7c4d8
ignore not found private signals
2022-01-28 14:20:16 +01:00
Miodrag Milanovic
f0f3c81c56
preserve VCD mangled names
2022-01-28 14:10:39 +01:00
Miodrag Milanovic
72acce0c82
detect edges even when x
2022-01-28 13:53:27 +01:00
Miodrag Milanovic
81b76155d6
recursive check
2022-01-28 13:24:38 +01:00
Miodrag Milanovic
a8d03df173
cleanup
2022-01-28 12:54:16 +01:00
Miodrag Milanovic
4f75a2ca1b
Do actual compare
2022-01-28 12:50:41 +01:00
Miodrag Milanovic
7101df62f8
Fix for limit_range_end when not writing vcd
2022-01-28 12:15:14 +01:00
Miodrag Milanovic
3e35de2be1
Add more options and time handling
2022-01-28 10:18:02 +01:00
Miodrag Milanovic
ccc3e3d13a
update version
2022-01-26 17:24:17 +01:00
Miodrag Milanovic
40018e191b
Display values of outputs
2022-01-26 16:52:36 +01:00
Miodrag Milanovic
226dc659f0
Fix tabs/spaces
2022-01-26 16:39:51 +01:00
Miodrag Milanovic
be7be63fec
Check if stimulated
2022-01-26 15:51:43 +01:00
Miodrag Milanovic
9a8939f0a4
Read fst and use data to set inputs
2022-01-26 15:50:38 +01:00
Miodrag Milanovic
8a02616465
Add fstdata helper class
2022-01-26 10:23:38 +01:00
Miodrag Milanovic
c811a71301
Cleanup of config to support platforms
2022-01-26 09:58:27 +01:00
Miodrag Milanovic
ccfc00705a
Add ability to write to FST file
2022-01-26 09:26:19 +01:00
Miodrag Milanovic
9e9083bbe9
Add FST library
2022-01-25 09:53:41 +01:00
github-actions[bot]
bc027b2cae
Bump version
2022-01-20 01:06:01 +00:00
gatecat
f699c4ba58
nexus: Fix BB sim model
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Signed-off-by: gatecat <gatecat@ds0.me>
2022-01-19 18:14:24 +00:00
Miodrag Milanovic
36482680d5
Removed dbits 8 since 9 will always be picked
2022-01-19 08:51:25 +01:00
Miodrag Milanović
4525e419f6
Merge pull request #3120 from Icenowy/anlogic-bram
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anlogic: support BRAM mapping
2022-01-19 08:49:58 +01:00
github-actions[bot]
59382945a9
Bump version
2022-01-18 01:00:53 +00:00
Miodrag Milanović
55924de708
Merge pull request #3162 from YosysHQ/mmicko/windows_guidelines
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Add info about VS build
2022-01-17 13:20:45 +01:00
Miodrag Milanović
703306c119
Update guidelines/Windows
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Co-authored-by: N. Engelhardt <nakengelhardt@gmail.com>
2022-01-17 13:11:15 +01:00
N. Engelhardt
891eec2882
Merge pull request #3145 from nakengelhardt/advertise_suite_in_readme
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mention tabby+oss cad suite in readme
2022-01-17 12:50:53 +01:00
N. Engelhardt
15b4d05805
mention distributions' package manager
2022-01-17 12:49:32 +01:00
Miodrag Milanović
41e215219b
Add info about VS build
2022-01-17 10:07:56 +01:00
github-actions[bot]
61324cf55f
Bump version
2022-01-12 00:59:23 +00:00
Miodrag Milanovic
b91533d9f2
Forgot one
2022-01-11 09:39:45 +01:00
Miodrag Milanovic
883b4fb7e6
Change url to https
2022-01-11 08:56:33 +01:00
Miodrag Milanovic
c428a894c0
Next dev cycle
2022-01-11 08:39:34 +01:00
Miodrag Milanovic
8b1eafc3ad
Release version 0.13
2022-01-11 08:35:50 +01:00
Miodrag Milanovic
64972360a8
Update CHANGELOG
2022-01-11 08:21:12 +01:00
github-actions[bot]
0feba821a8
Bump version
2022-01-09 01:01:33 +00:00
Zachary Snow
aa35f24290
sv: auto add nosync to certain always_comb local vars
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If a local variable is always assigned before it is used, then adding
nosync prevents latches from being needlessly generated.
2022-01-07 22:53:22 -07:00
Zachary Snow
828e85068f
sv: fix size cast internal expression extension
2022-01-07 21:21:02 -07:00
github-actions[bot]
59a7150344
Bump version
2022-01-05 01:00:24 +00:00
Zachary Snow
66447e8faf
logger: fix unmatched expected warnings and errors
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- Prevent unmatched expected error patterns from self-matching
- Prevent infinite recursion on unmatched expected warnings
- Always print the error message for unmatched error patterns
- Add test coverage for all unmatched message types
- Add test coverage for excess matched logs and warnings
2022-01-04 13:39:34 -07:00
Austin Seipp
b022fe61a7
opt_dff: fix sequence point copy paste bug
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Newer GCCs emit the following warning for opt_dff:
passes/opt/opt_dff.cc:560:17: warning: operation on ‘ff.Yosys::FfData::has_clk’ may be undefined [-Wsequence-point]
560 | ff.has_clk = ff.has_ce = ff.has_clk = false;
| ~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Which is correct: the order of whether the read or write of has_clk
occurs first is undefined since there is no sequence point between them.
This is almost certainly just a typo/copy paste error and objectively
wrong, so just fix it.
Signed-off-by: Austin Seipp <aseipp@pobox.com>
2022-01-04 18:18:08 +01:00
N. Engelhardt
6483e691bc
mention tabby+oss cad suite in readme
2022-01-04 15:44:37 +01:00
gatecat
493b5e03e7
manual: Fix cell-stmt order
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Signed-off-by: gatecat <gatecat@ds0.me>
2022-01-03 18:17:10 -07:00
github-actions[bot]
361916ad3e
Bump version
2022-01-04 00:58:28 +00:00
Zachary Snow
e0e4dfb55e
fix iverilog compatibility for new case expr tests
2022-01-03 12:11:41 -07:00
Zachary Snow
207af4196b
fixup verilog doubleslash test
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- add generated doubleslash.v to .gitignore
- ensure backend verilog can be read again
2022-01-03 08:17:46 -07:00
Zachary Snow
8c509a5659
sv: fix size cast clipping expression width
2022-01-03 08:17:35 -07:00