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828 Commits

Author SHA1 Message Date
Eddie Hung 914074a07c Update from master 2019-05-28 09:35:45 -07:00
Eddie Hung ba9513b325 Merge remote-tracking branch 'origin/master' into xc7mux 2019-05-28 09:30:53 -07:00
Clifford Wolf ba2185ead8 Refactor hierarchy wand/wor handling 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-28 16:43:25 +02:00
Clifford Wolf 0971f772d7 Fix handling of warning and error messages within log_make_debug-blocks 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-22 13:46:38 +02:00
Eddie Hung fb09c6219b Merge remote-tracking branch 'origin/master' into xc7mux 2019-05-21 14:21:00 -07:00
Clifford Wolf 287de4b848 Add rewrite_sigspecs2, Improve remove() wires 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-15 16:01:00 +02:00
Clifford Wolf 3870e7cf29
Merge pull request #991 from kristofferkoch/gcc9-warnings 
Fix all warnings that occurred when compiling with gcc9
 2019-05-08 11:25:22 +02:00
Kristoffer Ellersgaard Koch 30c762d3a1 Fix all warnings that occurred when compiling with gcc9 2019-05-08 10:27:14 +02:00
Clifford Wolf c582a25bdb
Merge pull request #998 from mdaiter/get_bool_attribute_opts 
Minor optimization to get_attribute_bool
 2019-05-08 08:34:35 +02:00
Matthew Daiter 6e629d2895 Minor optimization to get_attribute_bool 2019-05-07 22:04:28 -05:00
Matthew Daiter bafbb9ee90 Optimize ceil_log2 function 2019-05-07 12:17:56 -05:00
Clifford Wolf 87426f5a06 Improve write_verilog specify support 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-04 08:46:24 +02:00
Eddie Hung d9c4644e88 Merge remote-tracking branch 'origin/master' into clifford/specify 2019-05-03 15:05:57 -07:00
Eddie Hung 5cd19b52da Merge remote-tracking branch 'origin/master' into xc7mux 2019-05-02 10:44:59 -07:00
Clifford Wolf 9268cd1613 Fix performance bug in RTLIL::SigSpec::operator==(), fixes #970 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-30 15:19:10 +02:00
Oleg Endo 4f15e7f00f fix codestyle formatting 2019-04-29 19:20:33 +09:00
Oleg Endo e531fb203a escape spaces with backslash when writing dep file 
filenames are sparated by spaces in the dep file.  if a filename in the
dep file contains spaces they must be escaped, otherwise the tool that
reads the dep file will see multiple wrong filenames.
 2019-04-29 16:13:34 +09:00
Eddie Hung dcc8a13e48 Revert "Merge branch 'eddie/split_shiftx' into xc7mux" 
This reverts commit 3042d58330, reversing
changes made to feff976454.
 2019-04-26 15:32:02 -07:00
Eddie Hung 3042d58330 Merge branch 'eddie/split_shiftx' into xc7mux 2019-04-25 17:31:27 -07:00
Clifford Wolf 64925b4e8f Improve $specrule interface 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-23 22:57:10 +02:00
Clifford Wolf 4575e4ad86 Improve $specrule interface 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-23 22:18:04 +02:00
Clifford Wolf 71c38d9de5 Add $specrule cells for $setup/$hold/$skew specify rules 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-23 21:36:59 +02:00
Clifford Wolf e807e88b60 Rename T_{RISE,FALL}_AVG to T_{RISE,FALL}_TYP to better match verilog std nomenclature 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-23 21:36:59 +02:00
Clifford Wolf aec2475a9d Add CellTypes support for $specify2 and $specify3 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-23 21:36:59 +02:00
Clifford Wolf e1d73e03d3 Add InternalCellChecker support for $specify2 and $specify3 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-23 21:36:59 +02:00
Clifford Wolf 3cc95fb4be Add specify parser 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-23 21:36:59 +02:00
David Shah 742c2f245d Fixes for OAI4 cell implementation 
Fixes #955 and the underlying issue in #954

Signed-off-by: David Shah <dave@ds0.me>
 2019-04-23 17:54:00 +01:00
Eddie Hung 2c6358ea25 Remove kernel/cost.cc since master has refactored it 2019-04-22 11:21:17 -07:00
Eddie Hung 4883391b63 Merge remote-tracking branch 'origin/master' into xaig 2019-04-22 11:19:52 -07:00
Clifford Wolf e158ea2097 Add log_debug() framework 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-22 17:25:52 +02:00
Clifford Wolf 99d5435650
Merge pull request #905 from christian-krieg/feature/python_bindings 
Feature/python bindings
 2019-04-22 14:47:52 +02:00
Eddie Hung caec7f9d2c Merge remote-tracking branch 'origin/master' into xaig 2019-04-20 12:23:49 -07:00
Clifford Wolf 5b915f0153 Add "wbflip" command 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-20 11:04:46 +02:00
Eddie Hung 290a798cec Ignore 'whitebox' attr in flatten with "-wb" option 2019-04-18 10:32:00 -07:00
Eddie Hung c997a77014 Ignore 'whitebox' attr in flatten with "-wb" option 2019-04-18 10:19:45 -07:00
Eddie Hung 8fe0a961b3 Merge remote-tracking branch 'origin/clifford/whitebox' into xaig 2019-04-18 09:00:06 -07:00
Clifford Wolf f4abc21d8a Add "whitebox" attribute, add "read_verilog -wb" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-18 17:45:47 +02:00
Eddie Hung bca3cf6843 Merge branch 'master' into xaig 2019-04-08 16:31:59 -07:00
Clifford Wolf dfb242c905 Add "read_ilang -lib" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-05 17:31:49 +02:00
Benedikt Tutzer 827a96d3a3 Global lists in rtlil.cc are now static objects 2019-04-03 14:27:39 +02:00
Benedikt Tutzer 0774a500d4 Added support for changing Yosys namespace 2019-04-03 12:21:21 +02:00
Benedikt Tutzer 072c939380 Fixed identation 2019-04-01 13:36:01 +02:00
Benedikt Tutzer 03d1606b42 Merge remote-tracking branch 'origin/master' into feature/python_bindings 2019-03-28 12:16:39 +01:00
Clifford Wolf 3b796c033c Add RTLIL::Const::ext[su](), fix RTLIL::SigSpec::extend_u0 for 0-size signals 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-23 14:38:48 +01:00
Clifford Wolf 370db33a4c Add fmcombine pass 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-15 20:46:17 +01:00
Clifford Wolf 76c9c350e7 Add hashlib "<container>::element(int n)" methods 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-14 22:04:42 +01:00
Clifford Wolf 1cd04a6838 Fix a bug in handling quotes in multi-cmd lines in Yosys scripts 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-12 21:15:11 +01:00
Clifford Wolf 20c6a8c9b0 Improve determinism of IdString DB for similar scripts 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-11 20:12:28 +01:00
Clifford Wolf d9bb5f3637 Add ENABLE_GLOB Makefile switch 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-11 01:08:36 -07:00
Eddie Hung f7c7003a19 Merge remote-tracking branch 'origin/master' into xaig 2019-02-26 13:16:03 -08:00