yosys

Author	SHA1	Message	Date
Clifford Wolf	4a6d234ec7	SigSpec refactoring: cleanup of old SigSpec usage in fsm_* commands	2014-07-22 23:11:36 +02:00
Clifford Wolf	28b3fd05fa	SigSpec refactoring: change RTLIL::SigSpec::chunks() to be read-only, created interim RTLIL::SigSpec::chunks_rw()	2014-07-22 20:58:44 +02:00
Clifford Wolf	4b4048bc5f	SigSpec refactoring: using the accessor functions everywhere	2014-07-22 20:39:37 +02:00
Clifford Wolf	a233762a81	SigSpec refactoring: renamed chunks and width to __chunks and __width	2014-07-22 20:39:37 +02:00
Clifford Wolf	06d96e8fcf	Fixes in fsm detect/extract for better detection of non-fsm circuits	2013-12-06 12:53:20 +01:00
Clifford Wolf	93a70959f3	Replaced RTLIL::Const::str with generic decoder method	2013-12-04 14:14:05 +01:00
Clifford Wolf	05483619f0	Some fixes to improve determinism	2013-08-09 12:42:32 +02:00
Clifford Wolf	d97782b848	Sort ctrl signals in fsm_extract	2013-08-08 15:46:00 +02:00
Clifford Wolf	c32b918681	Renamed opt_rmunused to opt_clean	2013-06-05 07:07:31 +02:00
Clifford Wolf	10956cb84a	Added [[CITE]] tags to abc and fsm_extract passes	2013-03-15 10:23:02 +01:00
Clifford Wolf	a338d1a082	Added help messages for fsm_* passes	2013-03-01 12:35:12 +01:00
Clifford Wolf	a7988c01af	Copy attributes from state signal to fsm cell	2013-01-05 11:44:47 +01:00
Clifford Wolf	7764d0ba1d	initial import	2013-01-05 11:13:26 +01:00