Clifford Wolf
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c863796e9f
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Fix "verific -extnets" for more complex situations
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-03-26 14:17:46 +01:00 |
Larry Doolittle
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99706b3bf4
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Squelch a little more trailing whitespace
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2018-12-29 12:46:54 +01:00 |
Clifford Wolf
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25e33d7ab8
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Major redesign of Verific SVA importer
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2018-02-27 20:33:15 +01:00 |
Clifford Wolf
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6d12c83d36
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Add support for SVA throughout via Verific
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2018-02-21 13:09:47 +01:00 |
Clifford Wolf
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5c6247dfa6
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Add support for SVA sequence concatenation ranges via verific
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2018-02-18 16:35:06 +01:00 |
Clifford Wolf
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9d963cd29c
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Add support for SVA until statements via Verific
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2018-02-18 14:57:52 +01:00 |
Clifford Wolf
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bc8ab3ab44
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Fix verific PRIM_SVA_AT handling in properties with PRIM_SVA_DISABLE_IFF
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2018-02-15 15:26:37 +01:00 |
Clifford Wolf
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baddb017fe
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Remove PSL example from tests/sva/
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2017-10-20 13:16:24 +02:00 |
Clifford Wolf
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4cf890dac1
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Add simple VHDL+PSL example
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2017-07-28 17:39:43 +02:00 |
Clifford Wolf
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c1cfca8f54
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Improve Verific SVA importer
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2017-07-27 14:05:09 +02:00 |
Clifford Wolf
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877ff1f75e
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Add counter.sv SVA test
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2017-07-27 12:37:16 +02:00 |
Clifford Wolf
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b24f737759
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Improve SVA tests, add Makefile and scripts
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2017-07-27 11:42:05 +02:00 |
Clifford Wolf
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84f15260b5
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Add more SVA test cases for future Verific work
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2017-07-22 16:35:46 +02:00 |
Clifford Wolf
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024ba310ec
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Add some simple SVA test cases for future Verific work
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2017-07-22 12:31:08 +02:00 |