riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
13,186 Commits 87 Branches 48 Tags 64 MiB
Commit Graph

7 Commits

Author SHA1 Message Date
Marcin Kościelnicki d48950d92d xilinx: Initial support for LUT4 devices. 
Adds support for mapping logic, including LUTs, wide LUTs, and carry
chains.

Fixes #1547
 2020-02-07 09:03:22 +01:00
Miodrag Milanovic af852a0ea8 Fix tests 2020-01-10 14:48:01 +01:00
Miodrag Milanovic a82c701668 Make test without iopads 2019-12-28 16:22:24 +01:00
Miodrag Milanovic 509da7ed1a Revert "Fix xilinx tests, when iopads are default" 
This reverts commit 477e43d921.
 2019-12-28 16:12:45 +01:00
Miodrag Milanovic 477e43d921 Fix xilinx tests, when iopads are default 2019-12-21 13:18:44 +01:00
Miodrag Milanovic 5603595e5c Share common tests 2019-10-18 12:19:59 +02:00
Miodrag Milanovic c2ec7ca703 Moved all tests in arch sub directory 2019-10-18 11:06:12 +02:00