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13813 Commits

Author SHA1 Message Date
Miodrag Milanovic 012f0e2952 memory blocks 2024-08-15 17:50:36 +02:00
Miodrag Milanovic 3ed5ea24b2 sortout more blackboxes 2024-08-15 17:50:36 +02:00
Miodrag Milanovic 0ecc2e597f PLLs 2024-08-15 17:50:36 +02:00
Miodrag Milanovic 200e1a7bfe more DSP wrappers 2024-08-15 17:50:36 +02:00
Miodrag Milanovic ce635abc21 NX_DSP/SPLIT 2024-08-15 17:50:36 +02:00
Miodrag Milanovic 60611b936b CDC_U 2024-08-15 17:50:36 +02:00
Miodrag Milanovic 815622f685 CDC_L wrappers 2024-08-15 17:50:36 +02:00
Miodrag Milanovic 827ea11503 start splitting blackboxes and add wrapper techmap 2024-08-15 17:50:36 +02:00
Miodrag Milanovic cfce7dd2f8 remove soc 2024-08-15 17:50:36 +02:00
Miodrag Milanovic 9700971a8a just copy LOC 2024-08-15 17:50:36 +02:00
Miodrag Milanovic 989eef29b2 produce less cells 2024-08-15 17:50:36 +02:00
Miodrag Milanovic 74289b7339 remove init from sdff 2024-08-15 17:50:36 +02:00
Miodrag Milanovic 4c1f84a686 add io mapping 2024-08-15 17:50:36 +02:00
Miodrag Milanovic 65d2ebac9d fix test 2024-08-15 17:50:36 +02:00
Lofty b0c4add642 Added lutram 2024-08-15 17:50:36 +02:00
Miodrag Milanovic 5d898ab223 Add blackboxes 2024-08-15 17:50:36 +02:00
Miodrag Milanovic 8374f0336d add family and ability to disable carry chains 2024-08-15 17:50:36 +02:00
Lofty b3f59c9820 Add NX_CY 2024-08-15 17:50:36 +02:00
Lofty b4e9bb0d85 Add FFs and related tests 2024-08-15 17:50:36 +02:00
Miodrag Milanovic b4a17cccc3 add few more tests 2024-08-15 17:50:36 +02:00
Miodrag Milanovic 93543bd874 add lut tests 2024-08-15 17:50:36 +02:00
Miodrag Milanovic 94b6f19cf0 Make lut init match vendor tools 2024-08-15 17:50:36 +02:00
Lofty 3b48e9df61 Add initial NanoXplore pass 2024-08-15 17:50:36 +02:00
Miodrag Milanović ceba889641
Merge pull request #4540 from YosysHQ/clang-11 
Replace test-compile (ubuntu-22.04, clang-11)
 2024-08-15 17:39:42 +02:00
github-actions[bot] 1eaf4e0790 Bump version 2024-08-15 00:17:57 +00:00
Krystine Sherwin d709177770
test-compile: Downgrade to focal 2024-08-15 09:44:20 +12:00
Martin Povišer a854903ff0
Merge pull request #4537 from povik/libparse-cleanup 
Liberty parsing cleanup
 2024-08-14 18:24:51 +02:00
Martin Povišer ab5d6b06b4 read_liberty: Fix omitted helper change 2024-08-13 20:12:38 +02:00
Martin Povišer 309d80885b read_liberty: Use available gate creation helpers 2024-08-13 18:47:36 +02:00
Martin Povišer 3057c13a66 Improve libparse encapsulation 2024-08-13 18:47:36 +02:00
Martin Povišer c35f5e379c Extend liberty tests 2024-08-13 18:47:36 +02:00
Martin Povišer 78382eaa6f libparse: Adjust whitespace 2024-08-13 18:47:36 +02:00
github-actions[bot] 4b9f452735 Bump version 2024-08-13 00:19:11 +00:00
Martin Povišer 8ce6219a34
Merge pull request #4528 from povik/bump-abc 
Bump ABC
 2024-08-12 15:53:16 +02:00
Martin Povišer bcb995b506 Sync with yosys-experimental branch 2024-08-08 17:33:54 +02:00
github-actions[bot] 77b2ae2e39 Bump version 2024-08-08 00:18:08 +00:00
Martin Povišer 4b5beb635f Pull ABC fix 2024-08-07 17:31:34 +02:00
Martin Povišer ebffe37e4c Bump ABC 2024-08-07 15:54:03 +02:00
Martin Povišer b1569de537
Merge pull request #4527 from povik/exec-newline 
exec: Add missing newline
 2024-08-07 13:04:48 +02:00
Martin Povišer 4c3203866f exec: Add missing newline 2024-08-07 13:02:00 +02:00
github-actions[bot] 669f8b18f0 Bump version 2024-08-07 00:18:20 +00:00
Miodrag Milanovic d08bf671b2 Next dev cycle 2024-08-06 09:48:35 +02:00
Miodrag Milanovic 80ba43d262 Release version 0.44 2024-08-06 09:42:28 +02:00
Miodrag Milanović e5d8505349
Merge pull request #4523 from YosysHQ/emil/no-lto-lld 
Makefile: no LTO and lld by default
 2024-08-06 09:08:09 +02:00
github-actions[bot] d2b5788674 Bump version 2024-08-06 00:18:14 +00:00
Emil J. Tywoniak eeecb54532 Makefile: no LTO and lld by default 2024-08-05 19:28:09 +02:00
N. Engelhardt 01b99972b4
Merge pull request #4518 from YosysHQ/micko/sim_signal_names 
Set ranges on exported wires in VCD and FST
 2024-08-05 15:03:59 +02:00
Miodrag Milanovic 6d98418f3d Set ranges on exported wires in VCD and FST 2024-08-02 15:23:00 +02:00
github-actions[bot] c788484679 Bump version 2024-07-30 00:18:19 +00:00
Miodrag Milanović 3e14e67374
Merge pull request #4500 from YosysHQ/micko/vhdl_mixcase 
VHDL is case insensitive, make sure netlist name is proper
 2024-07-29 16:44:13 +02:00