Commit Graph

13475 Commits

Author SHA1 Message Date
Jannis Harder 94d7c22714 yosys-witness: Add aiw2yw --present-only to omit unused signals 2023-12-14 16:45:19 +01:00
Jannis Harder 3fab4d42ec smtbmc: Allow raw SMT-LIBv2 comamnds and expressions for --incremental 2023-12-14 16:44:21 +01:00
Jannis Harder 111085669b smtbmc: Use fewer smt commands while writing .yw traces
Depending on the used solver and design this can be a signficant
performance improvement.
2023-12-14 16:42:48 +01:00
Martin Povišer 449e3dbbd3 cxxrtl: Mask `bmux` result appropriately 2023-12-14 06:57:28 +00:00
Krystine Sherwin 80c78aaad6
New example_synth code
`example_synth.rst` updated down to coarse-grain representation.
2023-12-14 16:21:52 +13:00
github-actions[bot] 39fdde87a7 Bump version 2023-12-14 00:16:03 +00:00
Krystine Sherwin 6d1caf6134
Initial synth_ice40 example
Overall structure in place to match the iCE40 flow.
Still needs a new example design, and more text for the later sections (which the counter doesn't cover).
2023-12-14 11:33:32 +13:00
Krystine Sherwin 3a153f99db
Add cell_libs.rst
Updates code examples, removing `counter_outputs.ys` in favour of a single script.  Also adds a .gitignore for the output file `synth.v`.
`example_synth.rst` still pending updated example.
2023-12-14 10:08:46 +13:00
Martin Povišer 112b11116d
Merge pull request #4072 from merryhime/cxxrtl-value-tests
cxxrtl: Add simple tests for cxxrtl::value from cxxrtl runtime
2023-12-13 18:11:26 +01:00
Merry 1dff3c83d9 tests/cxxrtl: Add -O2 2023-12-13 12:27:06 +00:00
Merry 29e0cc6acd cxxrtl: Add simple fuzzing tests for value 2023-12-13 12:21:44 +00:00
Merry d7cb6981b5 cxxrtl: Fix value::ctlz 2023-12-13 12:21:44 +00:00
Merry ded63bedd5 cxxrtl: Fix value::sshr 2023-12-13 12:11:57 +00:00
Merry ff53f3d2b6 cxxrtl: Fix value::shl 2023-12-13 12:02:30 +00:00
Henri Nurmi 1c8e58a736 cxxrtl: Fix formating 2023-12-13 06:08:01 +00:00
Henri Nurmi 79c0bfcb22 cxxrtl: Remove unnecessary length check 2023-12-13 06:08:01 +00:00
Henri Nurmi dbff694e3d cxxrtl: Use the base name of the interface file for the include directive
Prior to this fix, the `CxxrtlBackend` used the entire path for the include
directive when a separated interface file is generated (via the `-header`
option). This commit updates the code to use the base name of the interface
file.

Since the C++11 standard is used by default, we cannot take advantage of
the `std::filesystem` to get the basename.
2023-12-13 06:08:01 +00:00
github-actions[bot] 3ea6bca23e Bump version 2023-12-13 00:16:10 +00:00
Krystine Sherwin f44e8d0124
Working on extensions doc
Moved the last files out of the resources directory.
Some tidy up/reformatting of the extensions to allow literalincludes from `my_cmd.cc`.
Most (all?) of the getting started guidelines file is either in the quick guide section, or sections referenced by it.  Instead of including it verbatim, we'll instead just leave a reference to it but then jump straight into the quick guide.
Include an image for the absval generated module.  Still needs more surrounding text but it's good enough for now.

Also includes some other minor tidying, including removing the no longer used abc_01 code example.
2023-12-13 11:34:42 +13:00
Krystine Sherwin afe8eff790
Merge updated master into krys/docs 2023-12-13 10:17:25 +13:00
Krystine Sherwin 7f24ef37f8
Add todo 2023-12-13 10:15:51 +13:00
Krystine Sherwin 1733a76273
Updated ABC info
Includes comparison of `abc` v `abc9`. Also creates a new subsection of the
yosys internals for extending yosys (moving the previous extensions.rst into it).

Co-authored-by: Lofty <dan.ravensloft@gmail.com>
2023-12-13 10:08:45 +13:00
Martin Povišer 5837fe8c91
Merge pull request #4067 from povik/cxxrtl-udivmod-fix
cxxrtl: Fix `ctlz`, `udivmod`
2023-12-12 21:22:25 +01:00
Martin Povišer 320e75a3e3
Merge pull request #4065 from daglem/fix-AST_SHIFT-AST_SHIFTX
Respect the sign of the right operand of AST_SHIFT and AST_SHIFTX
2023-12-12 11:47:29 +01:00
Martin Povišer 7bded221a7
Merge pull request #4066 from daglem/dump_vlog-more-ast-nodes
Uncloak array expressions generated by read_verilog -dump_vlog2
2023-12-12 11:30:07 +01:00
Martin Povišer 18d1907fa8 cxxrtl: Assert well-formedness of input to `udivmod` 2023-12-12 10:08:12 +01:00
Martin Povišer 6206a3af30 cxxrtl: Handle case of `Bits < 4` in formatting of values 2023-12-12 09:51:17 +01:00
Krystine Sherwin e34a25ea27
TODOs
Blocking tasks are now capital TODO (compared to non-blocking todo).
Updated some of the todos.
Added note about which intel synth does which families.
Rename extended Yosys universe to Yosys family.
Added brief text to landing page, and also a note about the restructure and where to find old docs.
Moved todolist above ToC in preparation for disabling it in the config (so that it doesn't need it's own header).

Fixed pdf build, was previously breaking on trying to include the svg badges.
2023-12-12 12:05:45 +13:00
Martin Povišer c848d98d91 cxxrtl: Fix `udivmod` logic 2023-12-11 22:11:35 +01:00
Martin Povišer bcf5e92389 cxxrtl: Fix `ctlz` implementation 2023-12-11 22:10:51 +01:00
Dag Lem 655921e851 Uncloak array expressions generated by read_verilog -dump_vlog2
Explicit conversion of AST_TO_SIGNED, AST_TO_UNSIGNED, and AST_CAST_SIZE
makes it possible to reason about simplified array expressions.
2023-12-11 19:12:35 +01:00
Dag Lem cda470d63e Respect the sign of the right operand of AST_SHIFT and AST_SHIFTX
The $shift and $shiftx cells perform a left logical shift if the second
operand is negative. This change passes the sign of the second operand
of AST_SHIFT and AST_SHIFTX into $shift and $shiftx cells, respectively.
2023-12-11 18:58:34 +01:00
Jannis Harder cca12d9d9b
Merge pull request #4055 from povik/sim-hier-prints
sim: Print hierarchy for failed assertions
2023-12-11 16:55:36 +01:00
N. Engelhardt 2858c33f68
Merge pull request #4058 from povik/fix-py-example 2023-12-11 16:49:47 +01:00
Jannis Harder fe686e725f
Merge pull request #4062 from povik/iterator-c++17
Remove deprecated `std::iterator`, fix iterator types
2023-12-11 16:44:31 +01:00
Krystine Sherwin 4ecceaed44
Updates to install and tests
Includes CAD suite info and details on the OSS CAD suite nightly build targets.
Instructions for building from source, largely based on the readme but with some minor modifications.
Tests are still WIP, but we replaced the old test suites with a brief comment on the github workflow tests.  Still needs more on the tests themselves and how to run them locally.
Also an extra todo on the index page.
2023-12-11 12:44:05 +13:00
github-actions[bot] 373b651d5b Bump version 2023-12-10 00:17:47 +00:00
Martin Povišer 4cce491639 celledges: s/x_jump/zpad_jump/ 2023-12-10 00:27:42 +01:00
Merry 0681baae19 cxxrtl: Extract divmod algorithm into value 2023-12-09 19:23:04 +00:00
Merry 99c8143ded cxxrtl: Remove redundant divmod 2023-12-09 19:23:04 +00:00
Martin Povišer 80b8cd19c4 rtlil: Fix value type for iterator over `SigSpec`
When we are iterating over a `SigSpec`, the visited values will be of
type `SigBit` (as is the return type of `operator*()`). Account for that
in the publicly declared types.
2023-12-09 19:01:39 +01:00
Martin Povišer 189064b8da rtlil, hashlib: Remove deprecated `std::iterator` usage
`std::iterator` has been deprecated in C++17. Yosys is being compiled
against the C++11 standard but plugins can opt to compile against a
newer one. To silence some deprecation warnings when those plugins are
being compiled, replace the `std::iterator` inheritance with the
equivalent type declarations.
2023-12-09 19:01:39 +01:00
Krystine Sherwin f949579cf3
Testing latexpdf build
Also added `seealso` blocks to example synth.
2023-12-08 11:19:12 +13:00
Krystine Sherwin 25f6a98f52
Updating the intro
Based on the Ignite presentation and github.
Adds links for the extended Yosys universe.
Moves the original thesis stuff further down (and labels it as such).
2023-12-08 10:46:05 +13:00
Krystine Sherwin aef9921fc9
Tidying TODOs 2023-12-08 09:50:10 +13:00
Martin Povišer e6021b2b48
Merge pull request #4057 from jix/peepopt_shiftmul_right_padding_fix
peepopt: Fix padding for the peepopt_shiftmul_right pattern
2023-12-07 14:56:53 +01:00
Martin Povišer 44c72e5223 python: Fix import in plugin example
When a plugin is being loaded from Python source, the binding will be
available under

    import libyosys

That is unfortunately different from how a self-standing Python program
would import the Yosys interface, which is

    from pyosys import libyosys

Until that is made consistent, at least fix the example to have it
working as is.
2023-12-07 14:32:29 +01:00
Krystine Sherwin 1e3b90ae56
Removing typical phases doc
Moved remaining content into relevant places.
Added `load_design.rst` to more scripting.
Split fsm handling and abc out of optimization passes. Also moved things around to match the general flow previously described.
Changed generic `synth` for `prep` instead.
2023-12-07 17:14:21 +13:00
github-actions[bot] fb4cbfa735 Bump version 2023-12-07 00:16:21 +00:00
Krystine Sherwin f9ce3d1c26
WIP merging synth phases with example
Replace `typical_phases.rst` and `examples.rst` with a single `example_synth.rst`.
Also updating the counter example to match.

Aims to reduce redundancy, and simplify the getting started section.
Details on things like `proc`, `memory` and `fsm` should instead be in the advanced section (under the new `synth` subsection).
2023-12-07 13:04:46 +13:00