Commit Graph

10112 Commits

Author SHA1 Message Date
Marcelina Kościelnicka 943147b768 dfflegalize: typo fix 2020-07-07 15:00:52 +02:00
Marcelina Kościelnicka d5e5d96527 efinix: Use dfflegalize. 2020-07-06 12:28:17 +02:00
Marcelina Kościelnicka c73ebeb90e gowin: Use dfflegalize. 2020-07-06 12:27:46 +02:00
Kamil Rakoczy b422f2e4d0 Add logic param and integer bad syntax tests
Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
2020-07-06 09:18:48 +02:00
Lukasz Dalek 7e83a51fc9 Support logic typed parameters
Signed-off-by: Lukasz Dalek <ldalek@antmicro.com>
2020-07-06 09:18:48 +02:00
Dan Ravensloft 09ecb9b2cf intel_alm: direct M10K instantiation 2020-07-05 23:28:59 +02:00
Marcelina Kościelnicka af54b8bc61 Naming fixes. 2020-07-05 22:21:59 +02:00
Dan Ravensloft 7f45cab27a synth_gowin: ABC9 support
This adds ABC9 support for synth_gowin; drastically improving
synthesis quality.
2020-07-05 22:07:17 +02:00
Dan Ravensloft 0d4c2f0a65 intel_alm: add Cyclone 10 GX tests 2020-07-05 21:36:38 +02:00
Marcelina Kościelnicka b5f3b70cfe
Merge pull request #2236 from YosysHQ/mwk/dfflegalize-ice40
ice40: Use dfflegalize.
2020-07-05 18:50:25 +02:00
Marcelina Kościelnicka 372521ca56 ecp5: Use dfflegalize. 2020-07-05 18:49:41 +02:00
whitequark 0cb6725b6e
Merge pull request #2227 from Ravenslofty/ccache
Add option to use ccache when building
2020-07-05 15:53:41 +00:00
Marcelina Kościelnicka 90b89e5ebc
Merge pull request #2232 from YosysHQ/mwk/gowin-sim-init
gowin: Fix INIT values in sim library.
2020-07-05 12:02:31 +02:00
Marcelina Kościelnicka f3f55ae7c2 dfflegalize: Prefer mapping dff to sdff before adff
This ensures that, when both sync and async FFs are available and abc9
is involved, the sync FFs will be used, and will thus remain available
for sequential synthesis.
2020-07-05 12:01:43 +02:00
Marcelina Kościelnicka 7afcb72c98 opt_expr: Fix crash on $mul optimization with more zeros removed than Y has.
Fixes #2221.
2020-07-05 06:31:58 +02:00
Dan Ravensloft b004f09018 intel_alm: DSP inference 2020-07-05 05:39:20 +02:00
Marcelina Kościelnicka 1fc8c3a0d1 ice40: Use dfflegalize. 2020-07-05 05:12:09 +02:00
Marcelina Kościelnicka 9beed4d771 gowin: Fix INIT values in sim library. 2020-07-05 03:03:48 +02:00
Dan Ravensloft 01772dec8c gowin: replace determine_init with setundef 2020-07-04 23:26:56 +02:00
Marcelina Kościelnicka 3ca2de0f77 synth_intel_alm: Use dfflegalize. 2020-07-04 22:56:16 +02:00
Dan Ravensloft 7d5828a706 Add option to use ccache when building 2020-07-04 19:59:39 +01:00
Marcelina Kościelnicka 6b0ac04698 efinix: Nuke efinix_gbuf in favor of clkbufmap. 2020-07-04 20:53:43 +02:00
Dan Ravensloft c6765443fd Improve MISTRAL_FF specify rules
Co-authored-by: Eddie Hung <eddie@fpgeh.com>
2020-07-04 19:45:10 +02:00
Eddie Hung 52fbaeca07 tests: update fsm.ys resource count
Suspect it is to do with map/set ordering in techmap; should
be fixed by #1862?
2020-07-04 19:45:10 +02:00
Eddie Hung 27a9d1b6e6 abc9: only techmap (* abc9_flop *) modules 2020-07-04 19:45:10 +02:00
Eddie Hung 2bdced0d68 intel_alm: compose $__MISTRAL_FF_SYNCONLY from MISTRAL_FF 2020-07-04 19:45:10 +02:00
Eddie Hung 0ba79feb6f abc9: techmap from user design to allow abc9_flop modules to be composed
from other primitives
2020-07-04 19:45:10 +02:00
Eddie Hung 3db3e1e149 intel_alm: add $__ prefix to MISTRAL_FF_SYNCONLY 2020-07-04 19:45:10 +02:00
Dan Ravensloft 83cde2d02b intel_alm: ABC9 sequential optimisations 2020-07-04 19:45:10 +02:00
Rupert Swarbrick a9b61080a4 Add newlines to help text for dfflegalize
I think these were probably missed by accident. Spotted because GCC
spits out lots of messages like this:

passes/techmap/dfflegalize.cc:114:7: warning: zero-length gnu_printf format string [-Wformat-zero-length]
  114 |   log("");
      |       ^~

(because we tell GCC that the first argument to log() looks like a
printf control string in log.h, and a zero length such string triggers
a warning).
2020-07-03 12:30:12 +02:00
clairexen 3d8d98d709
Merge pull request #2132 from YosysHQ/eddie/verific_initial
verific: rewrite initial assume/asserts prior to elaboration
2020-07-02 17:50:22 +02:00
clairexen e4b9e64d1b
Merge pull request #2208 from boqwxp/qbfsat-cleanup
qbfsat: Cleanup and refactoring
2020-07-02 17:48:37 +02:00
clairexen 5428666151
Merge pull request #2186 from YosysHQ/mwk/dfflegalize
Add dfflegalize pass.
2020-07-02 17:46:11 +02:00
clairexen d3422f8a5e
Merge pull request #2211 from YosysHQ/mwk/fix-fmcombine-ff
fmcombine: use the master ff cell type list
2020-07-02 17:43:48 +02:00
clairexen 5dbf91847a
Merge pull request #2210 from YosysHQ/mwk/fix-opt_merge
opt_merge: use the master FF type list
2020-07-02 17:43:34 +02:00
clairexen 5d740ec4b4
Merge pull request #2195 from YosysHQ/mwk/manual-gates
Add a few more gate types to the manual.
2020-07-02 17:43:10 +02:00
Alberto Gonzalez 56f98b9e3d
qbfsat: Remove useless comment and #ifndef guards. 2020-07-01 19:55:16 +00:00
Alberto Gonzalez 3345d39e6f
qbfsat: Specify default values for some options in the help message. 2020-07-01 19:55:16 +00:00
Alberto Gonzalez 95e8016811
qbfsat: Clean up external executable command lines and update temporary directory name. 2020-07-01 19:55:16 +00:00
Alberto Gonzalez 8cd60be654
qbfsat: Clean up and refactor data structures into `qbfsat.h`. 2020-07-01 19:55:16 +00:00
clairexen 7450ee7f8a
Merge pull request #2203 from antmicro/fix-grammar
Signed and macro grammar update
2020-07-01 16:41:32 +02:00
clairexen 8ce4f8790e
Merge pull request #2179 from splhack/static-cast
Support SystemVerilog Static Cast
2020-07-01 16:40:20 +02:00
clairexen b1707407a0
Merge pull request #2138 from boqwxp/qbfsat-oflag
qbfsat: Add `-O[012]` options to control pre-solving simplification with ABC
2020-07-01 16:35:27 +02:00
clairexen 2b0f6e24e2
Merge pull request #2206 from boqwxp/qbfsat-fix-name-specialization
qbfsat: Fix name-based hole specialization
2020-07-01 16:34:32 +02:00
Marcelina Kościelnicka 6b42819a37 dfflegalize: Add tests. 2020-07-01 01:57:15 +02:00
Marcelina Kościelnicka e3564b4502 Add dfflegalize pass. 2020-07-01 01:57:15 +02:00
Marcelina Kościelnicka 7c91f13f51 fmcombine: use the master ff cell type list 2020-06-30 21:07:17 +02:00
Marcelina Kościelnicka 77b15dd8e9 opt_merge: use the master FF type list 2020-06-30 20:57:35 +02:00
clairexen 9d658a1970
Merge pull request #2136 from zachjs/master
Allow constant function calls in for loops and generate if and case
2020-06-30 17:38:49 +02:00
clairexen 3fb5b4fd8a
Merge pull request #2199 from YosysHQ/mmicko/sim_memory
sim - error when memrd and memwr detected
2020-06-30 17:12:51 +02:00