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Merge pull request #2192 from YosysHQ/verific_netbus_attr 

verific - import attributes for net buses
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clairexen 2020-06-25 16:40:30 +02:00 committed by GitHub
parent 0835a86e30 4aec50a863
commit 7d795d6fc7
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1 changed files with 5 additions and 1 deletions
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frontends/verific/verific.cc
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@ -1109,7 +1109,11 @@ void VerificImporter::import_netlist(RTLIL::Design *design, Netlist *nl, std::se
RTLIL::Wire *wire = module->addWire(wire_name, netbus->Size());
wire->start_offset = min(netbus->LeftIndex(), netbus->RightIndex());
import_attributes(wire->attributes, netbus, nl);
MapIter mibus;
FOREACH_NET_OF_NETBUS(netbus, mibus, net) {
import_attributes(wire->attributes, net, nl);
break;
}
RTLIL::Const initval = Const(State::Sx, GetSize(wire));
bool initval_valid = false;