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optimization, all items should have same attributes

This commit is contained in:
Miodrag Milanovic 2020-06-25 09:18:53 +02:00
parent f993d18755
commit 4aec50a863
1 changed files with 1 additions and 0 deletions
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frontends/verific/verific.cc
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@ -1112,6 +1112,7 @@ void VerificImporter::import_netlist(RTLIL::Design *design, Netlist *nl, std::se
MapIter mibus;
FOREACH_NET_OF_NETBUS(netbus, mibus, net) {
import_attributes(wire->attributes, net, nl);
break;
}
RTLIL::Const initval = Const(State::Sx, GetSize(wire));