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yosys/tests/arch/ice40/.gitignore

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Add new tests for Anlogic architecture Problems/questions: - memory.ys: ERROR: Failed to import cell gate.mem.0.0.0 (type EG_LOGIC_DRAM16X4) to SAT database. Why EG_LOGIC_DRAM16X4, not AL_LOGIC_BRAM? - Internal cell type $_TBUF_ is present.
2019-09-23 04:12:02 -05:00
*.log
/run-test.mk
+*_synth.v
+*_testbench