yosys/tests/arch/ice40
whitequark 93ef516d91
Merge pull request #1603 from whitequark/ice40-ram_style
ice40/ecp5: add support for both 1364.1 and Synplify/LSE RAM/ROM attributes
2020-04-10 14:51:01 +00:00
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.gitignore Moved all tests in arch sub directory 2019-10-18 11:06:12 +02:00
add_sub.ys Share common tests 2019-10-18 12:19:59 +02:00
adffs.ys Share common tests 2019-10-18 12:19:59 +02:00
bug1597.ys Import tests from #1628 2020-01-27 13:56:16 -08:00
bug1598.ys Add #1598 testcase 2019-12-27 16:44:57 -08:00
bug1626.ys Add #1626 testcase 2020-01-12 15:21:26 -08:00
bug1644.il.gz Add #1644 testcase 2020-01-17 15:57:52 -08:00
bug1644.ys Add #1644 testcase 2020-01-17 15:57:52 -08:00
counter.ys Call equiv_opt with -multiclock and -assert 2019-12-31 18:39:32 -08:00
dffs.ys Share common tests 2019-10-18 12:19:59 +02:00
dpram.v Moved all tests in arch sub directory 2019-10-18 11:06:12 +02:00
dpram.ys Moved all tests in arch sub directory 2019-10-18 11:06:12 +02:00
fsm.ys Fixed tests 2019-11-11 15:41:33 +01:00
ice40_dsp.ys ice40_dsp: add test 2020-01-17 15:38:26 -08:00
ice40_opt.ys Import tests from #1628 2020-01-27 13:56:16 -08:00
ice40_wrapcarry.ys Change attribute search value to specify precise location instead of simple line number. 2020-02-24 02:41:08 +00:00
latches.ys Share common tests 2019-10-18 12:19:59 +02:00
logic.ys Share common tests 2019-10-18 12:19:59 +02:00
macc.v Moved all tests in arch sub directory 2019-10-18 11:06:12 +02:00
macc.ys Moved all tests in arch sub directory 2019-10-18 11:06:12 +02:00
memories.ys ice40: do not map FFRAM if explicitly requested otherwise. 2020-04-03 05:51:40 +00:00
mul.ys Fix warnings 2019-12-31 18:40:11 -08:00
mux.ys Share common tests 2019-10-18 12:19:59 +02:00
rom.v Revert insertion of 'reg', leave note behind 2020-01-01 09:05:46 -08:00
rom.ys Moved all tests in arch sub directory 2019-10-18 11:06:12 +02:00
run-test.sh Fix path to yosys 2019-10-18 11:12:03 +02:00
shifter.ys Share common tests 2019-10-18 12:19:59 +02:00
tribuf.ys Share common tests 2019-10-18 12:19:59 +02:00