yosys/tests/sat/sizebits.ys

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read_verilog -sv sizebits.sv
prep; sat -verify -prove-asserts
Allow $size and $bits in verilog mode, actually check test case 2017-09-29 04:56:43 -05:00			`read_verilog -sv sizebits.sv`
			`prep; sat -verify -prove-asserts`