mirror of https://github.com/YosysHQ/yosys.git
4 lines
107 B
Coq
4 lines
107 B
Coq
|
module SB_CARRY (output CO, input I0, I1, CI);
|
||
|
assign CO = (I0 && I1) || ((I0 || I1) && CI);
|
||
|
endmodule
|