74 lines
4.6 KiB
Plaintext
74 lines
4.6 KiB
Plaintext
Material Thicknesses,,,Value (um),,Variable name
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field oxide (above silicon surface) ... underneath poly,,,0.07,,FOXSTEP
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"min. etch and fill capability for isolation, licon, and met1",,,0.15,,DEFC
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min. etch and fill capability for mcon,,,0.14,,CEFC
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min. etch and fill capability for via,,,0.18,,VEFC
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poly cap after SPE,,,0.2,,OVGTTH
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poly thickness,,,0.18,,POLYTH
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oxide spacer ,,,0.05,,SpThickn
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Pre-LI ILD thickness,,,0.5,,ILDTHICKN
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Licon1 etch angle (deg),,,10,,LICETANG
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Standard Licon bottom CD,,,0.08,,LBCD
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Mcon enclosure by Li,,,0,,mconLiEnclosure
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Via1 slope,,,0.02,,Via1Slope
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Oxide Bias for MM1,,,0.6,,BiasMM1
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Oxide Bias for MM2,,,0.6,,BiasMM2
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Oxide Bias for MM3,,,1.15,,BiasMM3
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Oxide Bias for MM4,,,1.15,,BiasMM4
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LI1 thickness for antenna ratio calculations,,,0.1,,LiThick
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Metal 1 thickness for antenna ratio calculations (S8D*),,,0.35,,Met1Thick
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Metal 2 thickness for antenna ratio calculations (S8D*),,,0.35,,Met2Thick
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Inductor thickness for antenna ratio calculation (S8D*),,,4,,IndmThick
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Metal 3 thickness for antenna ratio calculation (S8Q/SP8Q),,,0.8,,Met3thick_q
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Metal4 thickness for antenna ratio calculation (S8Q*/SP8Q),,,2,,Met4Thick_q
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Metal 3 thickness for antenna ratio calculation (S8P*/SP8P*),,,0.8,,Met3thick_p
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Metal4 thickness for antenna ratio calculation (S8P*/SP8P*),,,0.8,,Met4Thick_p
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Metal5 thickness for antenna ratio calculation (S8P*/SP8P* with 2um thick metal),,,2,,Met5Thick_p
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Metal5 thickness for antenna ratio calculation (S8P*/SP8P* with 1.2um thick metal),,,1.2,,Met5Thickp_12
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Metal 2 thickness for antenna ratio calculations (SP8T/S8T*),,,0.35,,Met2_Qthick
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Metal 3 thickness for antenna ratio calculations (S8T* other than S8TM*),,,0.85,,Met3_Qthick
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Metal 3 thickness for antenna ratio calculations (S8TM* flow),,,2,,Met3_TMthick
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Metal 3 thickness for antenna ratio calculations (SP8T flow),,,0.8,,Met3_SP8Tthick
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Photoresist thickness,,,1.14,,PRTHICKN
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Photoresist thickness for HV Tip Implants,,,0.3,,PrThickImplant
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Min width of tip implant opening,,,0.1,,minTip_impW
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NTM shadowing,,,0.16,,ntmShadowing
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HVNTM shadowing,,,0.232,,hvntmShadowing
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HVPTM shadowing,,,0.089,,hvptmShadowing
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pseudo-shadowing,,,0.045,,pseudoShadowing
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Channel length for low Vt PMOS,,,0.35,,lvtpmos_poly
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Width of the Low Leakage gate on each side of LowVt Pmos connected to power rails (requirement based on exp data),,,0.28,,LvtEnc_forPowerRail
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CD tolerance for PDM (3s),,,1,,PdmCD_tol
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Min process bias 3s tolerance,,,0.032,,PHTOL
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Min process bias 3s tolerance for poly,,,0.02,,PHP1TOL
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Minimum Space and Overlap,,,Value (um),,Variable name
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Minimum mcon overlap onto LI for reproducible contact resistance,,,0.12,,TCONOVLP
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Dogbone PR decay length (SRS 8/4/99),,,0.2,,DBPRDEC
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Bowing of rectangular contact (per edge) -- seal ring sizing,,,0.015,,TBOWINGSEAL
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Waffling / Pattern Density,,,Value,,Variable name
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S8 average FOM PD (extractions from logic device),,,0.45,,FOMPDAVG
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Size of small PD extraction box for rough tolerance (um),,,700,,SMALLPDBOX
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Size of large PD extraction box for rough tolerance (um),,,2000,,LARGEPDBOX
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Min pattern density for oxide,,,0.75,,OxideMinPD
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Min MM* PD range,,,0.3,,MMPDrange
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FOM 700um box PD tolerance for CMP (SOI8 PCR2) for all technologies,,,0.15,,FOM700TOL
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Stepping box shift as a percent of box size,,,0.5,,BOXSHIFT
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Maximum metal waffle drop pattern density in the frame,,,0.55,,PD_FrameWP
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Window size for frame waffle drop PD check,,,100,,WP_PDWINDOW
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Step size for frame waffle drop PD check,,,10,,WP_PDSTEP
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Other,,,Value,,Variable name
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Poly resistor width and spacing to reduce CD variation (um),,,0.33,,POLYRCD
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Poly resistor width and spacing to reduce CD variation (um),,,0.48,,POLYRSPC
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Spacing between slotted_licons (Not applicable when the two edges L= 0.19um),,,0.51,,LICM1SLSP1
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Precision resistor width to accommodate 6 contacts across,,,2.03,,PRECRESW
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Li resistor width (to drop one Licon w/o dogbones),,,0.29,,LIRESCD
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Correction factor for spacing to a wide metal line,,,2,,BIGMF
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Min spacing for created dnwell to pnp.dg (more restrictive than dnwell.4 rule),,,5,,cdnwPnpSpc
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"Min spacing between nwell and deep nwell on separate nets (Taken from dnwell.3 from S4* TDR *N plus rounded up, IGK request.)",,,6,,nwellDnwellSpc
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Min space between deep nwells used as photo diode (um),,,5,,PDDnwSpc
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Min space between dnwell (used for photo diode and other deep nwell (um),,,5.3,,PDDnwSpc1
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Min/Max width of nwell inside deep nwell (for photo diodes),,,0.84,,PDNwmCD
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Min/Max enclosure of nwell by deep nwell (for photo diode),,,1.08,,PDNwmDnwEnc
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Min/Max width of tap inside deep nwell (for photo diode),,,0.41,,PDTapCD
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Min/Max enclosure of tap by nwell inside deep nwell (for photo diode),,,0.215,,PDTapNwmEnc
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