Commit Graph

2765 Commits

Author SHA1 Message Date
Las Safin 024b4b232f
ispd 2021-08-27 16:23:35 +00:00
Las Safin dcc0e6aebf
include/coriolis -> include/coriolis2 2021-08-27 16:15:28 +00:00
Las Safin 99cf78f580
ispd work 2021-08-27 15:27:53 +00:00
Las Safin 552e54731a
katabatic 2021-08-27 15:16:06 +00:00
Las Safin 867df820f5
knik 2021-08-27 15:10:28 +00:00
Las Safin 9110d58ef2
equinox 2021-08-27 15:07:38 +00:00
Las Safin c253ef4ed7
bora 2021-08-27 14:49:00 +00:00
Las Safin 72b46d7802
katana 2021-08-27 14:36:23 +00:00
Las Safin 4dff6fd6c3
etesian and anabatic 2021-08-27 14:26:33 +00:00
Las Safin a5187f34b9
flute 2021-08-26 16:44:45 +00:00
Las Safin 83eb8b4a6b
cumulus 2021-08-26 16:23:26 +00:00
Las Safin 9aa450e8af
crlcore 2021-08-26 16:14:25 +00:00
Las Safin 68400d9437
crlcore work 2021-08-23 08:44:29 +00:00
Las Safin a7ecaeaa36
Cleanup 2021-08-23 08:44:07 +00:00
Las Safin 985ae3edde
coloquinte and lefdef 2021-08-22 11:40:56 +00:00
Las Safin 8c9353f791
hurricane builds 2021-08-22 11:17:47 +00:00
Las Safin 7c5679408f
Get vlsisapd and bootstrap building! 2021-08-22 10:54:22 +00:00
Las Safin be6260ab64
temporary commit 2021-08-22 05:47:36 +00:00
Las Safin 3bef114e97
Use CMake 2.8 2021-08-21 22:09:39 +00:00
Las Safin 5a536b93b4
Got it working? 2021-08-16 19:50:39 +00:00
Las Safin 435168931e
bad hack 2021-08-16 19:06:13 +00:00
Las Safin 82b6604e2b
wip 2021-08-16 17:41:57 +00:00
Jean-Paul Chaput f1668cec5f Disable BFD support by default.
* Change: In <tool>/CMakeLists.txt, add an USE_LIBBFD option to
    enable the link against the BFD library. Latest versions seems
    to have changed their API.
* Change: In bootstrap/ccp.by & builder/Builder.py, add an option
    "--bfd" (and self._bfd) to enable BFD support.
2021-07-17 13:01:19 +02:00
Jean-Paul Chaput 3687ca80e9 Add management for highly loaded leafs of H-Trees.
In the LS180, probably due to the implementation of a small RAM
with DFFs, some leaf of the clock tree (H-Tree) got heavily
loaded (around 80 DFFs sinks). Implement an option that allow
the leaf of the QuadTree to use three buffers instead of one.
The sinks are partitionned using their angle from the center
of the leaf (trigonometric direction). CChoose the bigger angle
gaps to perform the split.

* Change: In Cumulus/plugins.block.configuration.GaugeConf, in
     getNearestHorizontalTrack() and getNearestVerticalTrack() add an
     offset argument to shift the position of the requested track
     by a certain amount.
* Change: In Cumulus/plugins.block.configuration.GaugeConf, in
    createHorizontal(), add a flag to make the source end of the
    segment to "stick out". Useful when connecting to a stacked
    VIA top, but using a lower layer that can be shifted.
* New: In Cumulus/plugins.block.spares.Spares, BufferPool & QuadTree,
    add support for selection and management of multiple buffers at
    the same time. Basically returns a list of selected buffer
    instances instead of just one instance.
      Added HEAVY_LEAF_LOAD flag to Spares. To be used by all tools
    classes that makes use of it.
      Added QuadTree.runselect(), be sure to call it between different
    H-Tree operations, otherwise results will be strange.
* New: In Cumulus/plugins.block.htree.HTree, in case of heavy leaf
    load, in the leaf of the tree, allocate three buffers instead
    of one. Select them to form a triangle around the main one.
    That is, use (i,j), (i+1,j) and (i,j+1).
      Added a HTree._connectLeaf() to share the handling of the child
    buffer connexions. Whether they are leaf of not and heavy or not.
* Change: Cumulus/plugins.block.Block, expand HTree support to
    manage the HEAVY_LEAF_LOAD flag.
2021-07-01 14:01:44 +02:00
Jean-Paul Chaput c6f703b1cc New parameter "katana.trackFill" to control the dummy fill ratio. 2021-06-27 20:16:42 +02:00
Jean-Paul Chaput 106bc89cb5 Fix offgrid core power rings in symbolic/cmos configuration.
* Bug: In CRL/etc/symbolic/plugins.py, power lines around the core where
    badly spaced, allowing the filler to insert a fill wire that was
    causing both DRC error and short circuit.
2021-06-26 14:38:13 +02:00
Jean-Paul Chaput 3f42981fb2 Fix too narrow blockages areas for the SRAM/macro wrapper.
* In Cumulus/plugins/block/macro.py, the METAL3 blokage was too narrow
    on the left side, allowing use of METAL3 track too close from
    internal components.
      The METAL5 blockages around jumpers where also too narrow.
      Thoses problems where seen with the density filler which put
    wires everywhere.
2021-06-26 14:37:37 +02:00
Jean-Paul Chaput 5a43c1465e Fix badly filled tracks containing blockages.
* Bug: In Track::repair(), consider the blockage net as any other, so
    the metal filling works correctly (correct management of transitions
    between blockage and non-blockage).
2021-06-26 14:36:59 +02:00
Jean-Paul Chaput 46c4cc98df Fill every two tracks in Track::repair() to balance metal density. 2021-06-25 15:55:59 +02:00
Jean-Paul Chaput 6fc7ece575 Use fill_x0 instead of tie_x0 in Etesian::Slice::fillHole()
* Change: In Etesian::Slice::fillHole(), instead of cramming the home
    with tix_x0 only, put one tie at both ends and fill the rest
    with fill_x0. This should help the vendor density filler to
    equalze.
* New: In Etesian::Configuration, add the parameter:
    "etesian.tieName" (for tix_x0) as it now separate from the simple
    filler cells.
2021-06-24 11:18:22 +02:00
Jean-Paul Chaput fdf66cbf64 In Etesian bloat profile for FlexLib, expand mx2_x2 of one more pitch.
* In Etesian::BloatFlexLib::getDx(), expand the "mx2_x2" of one more
    pitch (2 instead of 1). The P&R was unable to allocate a critical
    diode under a slice that was littered with those cells in LS180.
2021-06-24 11:17:52 +02:00
Jean-Paul Chaput 2705226cd0 Manage .include in SPICE driver so they occurs only once.
SPICE simulators don't like to have the same model defined twice.
As we have a "one file per model policy", then we must include the
model file only once. This is particularly critical for standard
cells. So now, the driver include all the models in the top level,
both terminals ans intermediate. And the sub-models include nothing.
We stop at the "TerminalNetlist" level.
  Add an option flag througout all the Spice driver hierarchy to
convey that information.
2021-06-24 11:17:21 +02:00
Jean-Paul Chaput f49426f2bb The "d" and "s" terminals where inverted in the LibreSOC IOPadInOut.
* Bug: In cumulus/plugins.chip.libresocio, the ioPadInfos where inverting
   "d" and "s" terminals on IOPadInOut. This was indirectly detected by
   the DRC complaining about floating gates on the "d" connected nets!
2021-06-23 00:07:51 +02:00
Jean-Paul Chaput 98e95587cf Remove Spice extension after use. Checks for non-driven nets.
* New: cumulus/plugins.checks, plugin providing a oneDriver() function
    to check that each net has one and only one driver. This is for
    Cell that are not P&R (in which it is also checked). So, typically
    the chip level.
* New: In cumulus/plugins.chip.core2chip, add a call to oneDriver().
* Bug: In cumulus/plugins.chip.core2chip, clear Spice extensions after
    save. Otherwise we may use an outdated Spice extension after the
    P&R. This is were Net missing Spice::Bit may occur.
2021-06-23 00:07:25 +02:00
Jean-Paul Chaput 0d7e0fa88b Correct the SPICE driver in case a Net is missing Spice::BitExtension.
* Change: In Spice::Entity::toEntity(), add an error message if the
    Spice::Bit extension is missing.
2021-06-23 00:06:51 +02:00
Jean-Paul Chaput 51ca8ab4af Added basic SPICE driver support.
The structure of the driver is copied from the Vhdl one. It is not
integrated as a an AllianceFramework one but as a standalone like
GDS. For now use numerical indexes for electrical nodes but also
support strings. The nets are ordereds in reverse alphabetical
order, but a custom order can be defined, if we read the model
from an external SPICE subckt (to be done).
  SPICE saving has also been added to the cumulus/rsave plugin
and the block/chip P&R one.
2021-06-21 01:30:28 +02:00
Jean-Paul Chaput eeda81f746 Move deprectated version of Spice parser/driver out of the way. 2021-06-20 11:35:26 +02:00
Jean-Paul Chaput 68d957fe3a Prevent wires part of a diode cluster to be moved up.
Protections diodes may not be able to play their role if they are
separated from their cluster by upper level layers (METAL4/METAL5).
This seems not to diminish the total number of diodes.

* New: In Anabatic::NetData, add a set of non move up segments in
    the object. To tag global wires that are part of a cluster.
* New: In Anabatic::AutoSegment, add support for a SegNoMoveUp
    flag. This flag is propagated through _makeDogleg()	.
      Used in ::canMoveUp() and ::canPivotUp().
* New: In Anabatic::NetBuilder, add NetData to the attributes so
    we can extract the NoMoveUp infomation given by the antenna
    protect stage.
* New: In NetBuilderHV::_do_globalSegment(), lookup NoMoveUp
    information from NetData to put it in AutoSegment.
* New: In AntennaProtect(Net*), flags the RoutingPad clusters wires
    as non movable up.
* New: In AnabaticEngine::breatAt(GCell*), propagate the SegNoMoveUp
    flags. Based on NetData.
2021-06-18 19:17:24 +02:00
Jean-Paul Chaput 72b5de88c4 Fix bugs in AutoSegment::isMiddleStack() and canReduce().
* Bug: In AutoSegment::canReduce(), in the repair stage, segments are
    allowed to go beyond their GCell bondaries, so global segments can
    end up in zero length. So now allow globals less than one P-Pitch
    to be flagged as reduced.
* Bug: In AutoSegment::isMiddleStack(), systematically reject non-canonical
    segment. If it is non-canonical, then is aligned with a canonical one.
    Then we will perform the check on it.
      There seems to be another porblem of update of the length of the
    associated TrackElement, the increase of size of the non-canonical is
    not taken into account. This is enough to prevent the problem to
    arise but we should invsetigate further.
* Hack: In AutoSegment::canMoveUp(), prevent segment id:6378409 to be
    moved up so the last antenna effect is avoided. This is not a clean
    way to do it.
2021-06-17 23:49:54 +02:00
Jean-Paul Chaput ddc7aef13b At last make use of cdebug_log() in Track::repair(). 2021-06-17 23:36:35 +02:00
Jean-Paul Chaput f873e616cb Use of tset() manipulator instead of setw() when printing in cdebug_log. 2021-06-17 23:36:22 +02:00
Jean-Paul Chaput d43fa49778 Add basic support for logo insertion in cumulus/plugins.chip. 2021-06-16 16:26:33 +02:00
Jean-Paul Chaput 15e7abf667 Use the DATATYPE for LAYER record in GdsStream.
* Change: In GdsStream::_gdsLayerTable, use a map<> instead of a vector<>,
    use a combined value of the layer index and the datatype as index.
        (index = (layer<<16) + datatype.
    This allow for layers that are represented by a pair of (layer,datatype)
    with same layer and different datatypes.
* Change: In GdsStream::gdsToLayer(), now have two parameters, the layer
    and the datatype.
2021-06-16 16:24:01 +02:00
Jean-Paul Chaput 6c68055199 In core2chip, use the "padres" input of the analog pad. 2021-06-15 01:18:41 +02:00
Jean-Paul Chaput c83fff72ac Suppress cell fitting during P&R. 2021-06-15 01:17:01 +02:00
Jean-Paul Chaput 2e015ea780 Prune ordinary wires in Katana::PowerRails.
* Change: In Katana::PowerRails, in TerminalNetlist cells instances,
    the ordinary nets components where generating obstacles, leading
    to stupid cross blockages between the obstacle generated by the
    component supporting the routing pad and the RP itself.
      Now only take into account supplies and clocks (any layers)
    and blockage layers.
      Fix symbolic benches.
2021-06-13 12:03:57 +02:00
Jean-Paul Chaput 63d2f69459 Increate the reluctance to go up in Manipulator::moveUp().
* Change: In Katana::Manipulator::moveUp(), the "reserve" value was
    of 0.5 for pivot up and locals, now set it to 1.0, like in all
    other cases ("reserve" is the number of free tracks that is
    needed to allow the move up, in addition the the length being
    moved up).
      Fix routing convergence on the MIPS pipeline bench.
2021-06-13 12:03:35 +02:00
Jean-Paul Chaput 1569e2807e In CRL::GdsParser, GDS layers indexes up to 1024, just in case. 2021-06-12 17:52:29 +02:00
Jean-Paul Chaput f3ccf31e48 Fix incomplete GDS layer table in GdsParser.
* Bug: In CRL::GdsParser(), the table of GDS layer was limited to 64,
   which is the maximum, according to the reference. But it is no
   longer true. Extend to 256.
     This was leading to GDS files missing some layers.
2021-06-12 16:29:08 +02:00
Jean-Paul Chaput 3bd1d56582 Fix last DRC incorrect case in TrackSegment::isMiddleStack().
* Bug: In TrackSegment::isMiddleStack(), formerly, all global segments
    where discarted. But in the routing repair stage, segments can go
    *outside* their GCell boundaries, allowing globals to became of
    null length.
       Hence, for global, we now also check the wirelength.
2021-06-12 16:21:10 +02:00