* New: In cumulus/plugins.block.configuration, added class ConstantsConf
to store information and create instances of "zero" and "one" cells.
Added attribute in BlockConf class.
* Change: In cumulus/plugins.block.configuration, moved the cell cloning
and saving from block.spares.Spares to configuration.BlockConf as
it is a service that can be used by other modules than just spares.
Other modules may modificate the netlists also, like in XXXX.
* Change: In cumulus/plugins.chip.configuration, in various methods,
manage both cases when the layer is symbolic or real (difference
in accessing the underlying BasicLayers).
* Change: In cumulus/plugins.chip.configuration, less clutered display
of lambda length in trace mode (and use of 'L' as 'l' was too close
to '1').
* Bug: In cumulus/plugins.chip.corona.VerticalSide.addBlockages(),
as the clock are now on the *inner* rail(s), blockage must be on
the *outer* rails (power lines).
* New: In cumulus/plugins.chip.pads.Corner, add support for 45 degree
corners (cfg setting "chip.use45corners").
* New: In cumulus/plugins.chip.pads.Side.check(), correct computation
of the side's length. Was using the ioPadStep instead of the pad
cell width!
* Change: In cumulus/plugins.chip.pads.Corona._padAnalysis(), LibreSOCIO
pads uses Verticals for their ring wires (common sense would want
them *Horizontal*). So they must be included in the physical pin
detection, but in turn this cause havoc in pxlib... So create a
filtering according to the library name. This is *not* robust
but will do for now.
* New: In cumulus/plugins.chip.pad.core2chip.CoreToChip, rename
self.state into self.conf for clarity.
New method newEnableForNet(), to create "enable" nets on the
fly for emulated In/Out pads.
As it can edit the netlist (new "enable" nets) call the
BlockConf.rsave() method instead of direct saving through
AllianceFramework.
Raise NotImplementederror instead of ErrorMessage.
* New: In cumulus/plugins.chip.pad.core2chip.IoPad.createPad(),
on emulated In/Out I/O pad like for LibreSOC, generate on the fly
the right enable signal.
If an enable signal is given, it will be used (backward
compatible with the previous behavior).
* New: In cumulus/plugins.chip.pad.core2chip, support for real
LibreSOCIO pads in libresocio.py module.
* New: In cumulus/plugins/core2chip/, support for the FlexLib I/O cells
symbolic abstracts ("niolib"). More flexible way of specifying the
number and positions of the various power pads, both I/O power and
core power.
For niolib (FlexLib I/O abstract), support for multiple clocks,
that is, clock become ordinary pad (with signals typed as CLOCK).
* New: In cumulus/plugins/chip/, added support for niolib and final
integration of multiple clocks (only for niolib).
* Change: In CellWidget::drawGrid(), for the "super-grid", now use
lines instead of small crosses. The super-grid is set to 10 point
of the snap grid in all cases (symbolic, real, foundry grid).
* New: Export CellWidget::setDbuMode() to CellViewer, and into it's
Python wrapper.
* Bug: In CellWidget::setCell(), keep the dbuMode when loading a new
cell instead of reverting to default.
Note: The previous strategy was not fully coherent in chip mode.
Everything added, net and components must be added at
corona level and not separated between corona and core.
* New: In cumulus/plugins/block.configuration, new FeedsConf object
to handle the feeds and provide a filling area helper.
* New: In cumulus/plugins/block.spares.removeUnusedbuffers() to
remove unused buffers in the pools and replace them by feedthrough.
* Change: In cumulus/plugins.block.spares, unify coordinate/slice
computation. If we are in chip mode, the coordinates are
expressed in the corona *but* aligned on the slices of the
*core* model.
* Change: In cumulus/plugins.block.Block.rsave(), add the '_r' suffix
to the routed cells.
* Change: In cumulus/plugins.clocktree.ClockTree, when in chip mode
create everything at corona level. Also forgot to set type of
clock subnet as clock.
Note: To implement this in a more flexible way we should introduce a
concept of Instance/Cell "placeholder" to reserve space
transhierarchically.
* Change: In EtesianEngine::toColoquinte(), when placing only one block
in a cell, the cell itself can contains other fixed instances
that are over the placement area. Create dummy fixed instances
to reserve the taken space.
In EtesianEngine::AddFeeds(), do not put feed cells over the
cell area occuped by the sibling instances cells.
* Cleanup: In KatanaEngine::setupPowerRails(): small cleanup.
* Change: In CRL::vstDriver(), remove all Vhdl properties after running.
The properties are not updated if the cell (Entity) change, so the
next time it is called, an incomplete or incoherent state was saved
(for example, incomplete "port map"). Removing all properties is
less efficient but works.
* Cleanup: In CRL/helpers/overlay, remove forgotten debug message.
* Change: In Cumulus/plugins/block/spares, check that "block.spareSide"
is not below 7*sliceHeight and issue a warning instead of a later
divide by zero...
* Change: In CRL/etc/common/etesian.py, use double parameters
instead of percentages to simplify. For space margin and form
factor. This need the rewrite of coriolis2/settings.py in
alliance-check-toolkit.
* Bug: In CRL/helpers/overlay.CachedParameter.cacheRead(), values where
not read *from* the Configuration DB, due to a forgotten "self.".
In CRL/helpers/overlay.CfgCache.__setattr__(), value was simply
never set! Only interval and set of values were manageds!
In CRL/helpers/overlay.CfgCache.__getattr__(), must distinguish
between two access cases, when were are truly accessing a
CachedParameter, return it's *value*. Otherwise, it is a
recursive CfgCache, then return the object.
* New: In CRL::AllianceFramework::wrapLibrary(), can now add in the set
of AllianceLibrary one which is wrapped around another one. All the
cells must be already present and do attempt to save them with
AllianceFramework (AP parser will drive nonsensical datas).
* New: In CRL/helpers.overlay.CfgCache, create a class to fully handle
all the Configuration parameters settings. That is, range and
enumerated values. This way we can fully create them from
the CfgCache instead of merely changing the value of an
existing one.
Examples:
cfg.anabatic.gcell.displayMode = 1
cfg.anabatic.gcell.displayMode = ( ("Boundary", 1), ("Density", 2) )
cfg.katana.hTracksReservedLocal = 4
cfg.katana.hTracksReservedLocal = [ 0, 20 ]
Note: The port is not complete. Integration of LKCL patches will
follow shortly.
* Change: In cumulus/plugins/alpha/block, more simple inheritance
scheme. Use classic inheritance instead of @classdecorator.
BlockConf (renamed from BlockState) now inherit from GaugeConf,
Double inheritance tree, for Block/Chip and BlockConf/ChipConf.
Allow an uniform syntax for configuration parameters.
* New: In cumulus/plugins/alpha/chip, port of the chip plugin and
integrate with the block plugin. It is now a derived class of
Block. ChipConf is also a derived from BlockConf.
Obsolete "./coriolis2/ioring.py", all informations are given
though the ChipConf state class.
* New: In cumulus/plugins/alpha/core2chip, only Alliance/pxlib is
ported yet.
* New: In CRL/helpers/utils.py, create a Python "class decorator".
Works like a decorator but without the need of implementing
the Concrete/Abstract classes structure Design Pattern.
Create proxies in the derived class for the base class
attributes & methods.
* Change: In cumulus/plugins/alpha/block/configuration.py, enrich
the BlockState object to support core2chip parameters. Make it
even more autonomous from the Block class.
* New: In cumulus/plugins/alpha/core2chip, port of the core2chip plugin
and integration with the alphs/block plugin. At "constant features"
as a first. Only ported "cmos", phlib will be later.
Note: Keep the various hfnsX.py as toolboxes for future experiments.
* New: cumulus/plugins/block/hfns3.py, build the trunk of the
net as a RMST. First with the "Iterative One Steiner Point"
(terribly slow above 100 points) then with FLUTE.
For the global routing trunk, must be very cautious to
check that the cluster "graph point" is the one of the
it's buffer RoutingPad so both end up in the same GCell.
* New: cumulus/plugins/block/timing.py, stub for basic
timing computation and conversion between sink and
capacitance. Currently based on the fake 350nm given as
example in SxLib ("man sxlib"...).
* New: In Hurricane::NetRoutingProperty, add and change the meaning
of the following flags:
- ManualGlobalRoute : now means that a global routing *trunk*
is present, made of "gmetalh", "gmetalv" & "gcontact".
- Manualdetailroute : added, get the former meaning of
ManualGlobalRoute, that is, the detailed routing is
already present for this net, but can be changed by the
detailed router. Implies that it respect the Terminal,
HTee & VTee structuration.
* New: Add Anabatic::Diskstra::loadFixedGlobal(), to account
a manually global net into the edges capacities.
* New: In Anabatic::Edges::ripup(), exclude manually global routed
segments from the ripup. Change the segment sorting function
so that thoses segments are put in head of list (considered
as "smaller").
* Change: In AnabaticEngine::setupPreRouteds(), now detect manual
global routed and manual detail routed signals, and tag them
accordingly.
* New: In AnabaticEngine::Configuration & Session, add proxies
for the global routing layers ("gmetalh", "gmetalv", "gcontact").
* New: In Anabatic::Constants, add flags for global fixed and
detail routed nets.
* Change: In KatanaEngine::updateEstimateDensity(), now use int64_t
for flute coordinates.
* New: Add CRL::RoutingGauge::hasLayer(), to know if a layer is
managed by the gauge (comparison by mask).
* New: In flute, added a Python binding. Contains two methods: "readLUT()",
to load the POWV9.dat and POST9.dat and "flute()" to build a RSMT.
"flute()" takes a tuple of positions (themselves 2-uple) like:
( (x0,y0), (x1,y1,), ... (xN,yM) )
and returns a tuple of 3-uple of branches:
( (n0,x0,y0), (n1,x1,y1), ... )
In "flute.h", set the distance type (DTYPE) to int64_t to always
accomodate DbU::Unit.
As it now uses the Hurricane Python interface and the path utilities
from CRL Core, move it's compilation *after* them (see build.conf in
bootstrap).
To perform HFNS, recursively makes clusters of closest sinks, less than
30 sinks and with a control of the half-perimeter at all the clusters
levels. Clearly needs lots of improvements but the backbone of the
feature works. Make use of the pool buffers as do the clock tree.
Clustering is done with a degenerated Kruskal algorithm.
This is rougly based on the article:
Buffered Steiner Trees for Difficult Instances
Charles J. Alpert, Member, IEEE
IEEE TCAD, Vol. 21, No. 1, January 2002
0278–0070/02$17.00 (c) 2002 IEEE
* In NetBuilder::_do_xG_1PinM3(), in the three global case, an
incorrect connexion was made.
* In NetBuilder::_do_2G_xM1_1PinM2(), in the global E+W case,
segment between vtee1 <-> turn1 must be vertical.
* Change: In Hurricane::RoutingPad::getPlugOccurrence(), it was
forbidden to rebuild the Occurrence over anything other than
Plug. But as we now also uses Pins, it becomes useful to
rebuild the Occurrence on a Pin. The name of the function
stays, even if its less meaningful now.
* Bug: In Isobar::PyOccurrence, use "compare by value" instead of
"compare by pointer" for the Python comparison function. So we
really can compare identical Occurrences.
* New: In Isobar::PyPoint, export the "manhattanDistance()" function.
* New: In Isobal::PyCellViewer, add the following funtions to the
exported interface:
- "select()"
- "unselect()"
- "unselectAll()"
- "reframe()"
- "setShowSelection()"
So now we can easily highlight components from Python (to ease
debug).
* New: In Hurricane::CellViewer, create a proxy for the CellWidget
"reframe()" function.
When displaying big designs, the drawing was very slow because all
the graphical objects were browsed *before* deciding if they were
big enough for display. So we introduce a new mode of working of
the QuadTree to that the ones with areas *below* a certain thresold
just get skipped. Of course, the previous behavior must be preserved
(when the threhsold is zero or negative) as most of the time, we
*want* *all* the objects under an area, not only the biggest ones.
For now, in CellWidget, the visibility threshold is set to 20 pixels.
With this, we can display the Libre-SOC "test_issuer" of 100Kgates
in between 20 to 30s.
* New: In Hurricane::QuadTree_GosUnder collection & locator, add a
"threshold" argument so that QuadTree which both area sides are
below that lenght will be ignored (no walkthrough at all).
Zero (or negative) threshold means that no QuadTree will be
pruned, we get back to the previous behavior.
* New: In Hurricane::Slice::getComponentsUnder(), add the threshold
argument (with a default to 0).
* New: In Hurricane::Cell::getInstancesUnder(), add the threshold
argument (with a default to 0).
* New: In Hurricane::Query, added support for the threshold parameter.
In doQuery(), instances that have *both* side under the threshold
are pruned (slightly different from QuadTree areas).
* New: In Hurricane::CellWidget::_redraw(), set the visibility
threshold to 20 pixels (arbitrary, must be parametrized).
* New: In Hurricane::Cell, added destroyPhysical() method.
Remove *all* physical components and the DeepNets (so make
a virtual *unflatten*) in the correct dependency order.
In particular, RoutingPads, that relies on Occurrence over
physical components must be destroyeds *before* the entity
they are based on is destroyed.
* New: In CRL::PyAllianceFramework, export getCatalog(), in PyCatalog,
export the getState(name) method and add a PyCatalog_Link().
In PyCatalogState, add PyCatalogState_Link(), cannot use the
macro because of the C++ name resolution operator (Catalog::State).
* New: In Isobar, export the RoutingPads collection to the Python interface.
* New: In Hurricane::Net, export the getRoutingPads() method to the
Python interface (hence the need of the previous export).
* Bug: In cumulus/plugins/alpha/block/clocktree.ClockTree.splitClock(),
forgot to wrap inside an UpdateSession.
* Bug: In cumulus/plugins/alpha/block/clocktree.spares.raddTransNet(),
forgot to set the masterNet for recursive call when the plug already
exists.
* New: Added multiple clock support in H-Tree generation in alpha/block.
* New: In CRL/etc/<NODE>/<TECH>/plugins.py, added three new parameters
for block plugin config:
"block.spareSide" : The size of the minimum side of a buffered area.
(quad-tree leaf).
"spare.buffer" : The model of the cell buffer to be used.
"spare.maxSinks" : max number of sinks on a buffer before issuing
a warning (non-blocking).
* Bug: In Etesian::BloatCell::getAb(), never apply the bloat profile to
fixed cells. In case of buffers from the spare maxtrix it was leading
Coloquinte to detect an overlap of fixed cells, which it do not
support (rightly so).
* Change: In CRL/helpers.Trace, flush stderr before issuing the trace
message to avoid mixing up stdout & stderr (sometimes misleading).
* Change: In CRL/helpers.overlay.CfgCache, no longer display all the
applied setting after a call to apply(). Too verbose.
* Change: In CRL::Environment, regex_t are now pointers instead of values,
this way the "in initialization" flag can be removed (maybe still too
complicated).
Jean-Paul Chaput