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caravel/verilog/dv/cocotb/tests/uart
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M0stafaRady 9615629a42 fix bug bit time calculation 2022-10-01 02:53:24 -07:00
..
uart.py fix bug bit time calculation 2022-10-01 02:53:24 -07:00
uart_rx.c add test uart_rx 2022-10-01 02:23:47 -07:00
uart_tx.c Adding cocotb evironment with tests and scripts to run 2022-09-30 03:52:34 -07:00