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riscv
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caravel
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https://github.com/efabless/caravel.git
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934cf4e709
caravel
/
openlane
/
digital_pll
History
manarabdelaty
0067bd5b7c
[DATA] Update caravel_clocking/digital_pll/housekeeping
2021-12-02 21:09:43 +02:00
..
base.sdc
[DATA] Add views for caravel_clocking and updated digital_pll clock after constraining clock to 150 MHz
2021-11-15 15:50:43 +02:00
config.tcl
[DATA] Update caravel_clocking/digital_pll/housekeeping
2021-12-02 21:09:43 +02:00
pin_order.cfg
[DATA] Update digital_pll pin placement to have it align with the HK
2021-11-19 01:28:40 +02:00