caravel/openlane/digital_pll
manarabdelaty 37a07e291b [DATA] Update digital_pll pin placement to have it align with the HK 2021-11-19 01:28:40 +02:00
..
base.sdc [DATA] Add views for caravel_clocking and updated digital_pll clock after constraining clock to 150 MHz 2021-11-15 15:50:43 +02:00
config.tcl [DATA] Update digital_pll pin placement to have it align with the HK 2021-11-19 01:28:40 +02:00
pin_order.cfg [DATA] Update digital_pll pin placement to have it align with the HK 2021-11-19 01:28:40 +02:00