riscv
/
caravel
mirror of https://github.com/efabless/caravel.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
caravel/verilog/dv/cocotb/tests/spi_master
History
M0stafaRady 11330823b7 Add hk_regs_wr_wb_cpu test 2022-10-04 03:24:15 -07:00
..
SPI_VIP.py Add hk_regs_wr_wb_cpu test 2022-10-04 03:24:15 -07:00
spi_master.py add new test spi_master_rd 2022-10-03 05:36:36 -07:00
spi_master_rd.c add new test spi_master_rd 2022-10-03 05:36:36 -07:00
test_data add new test spi_master_rd 2022-10-03 05:36:36 -07:00