kareem
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0eed96f33f
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reharden: digital_pll
~ reimplement digital_pll using updated RTL
~ changes in config to generate same PDN
~ change deprecated variables
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2022-10-13 06:21:08 -07:00 |
manarabdelaty
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966b1f22bb
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[DATA] Update digital_pll
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2021-12-07 13:19:02 +02:00 |
manarabdelaty
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0067bd5b7c
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[DATA] Update caravel_clocking/digital_pll/housekeeping
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2021-12-02 21:09:43 +02:00 |
manarabdelaty
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37a07e291b
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[DATA] Update digital_pll pin placement to have it align with the HK
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2021-11-19 01:28:40 +02:00 |
manarabdelaty
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72b2c724c9
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[DATA] Add views for caravel_clocking and updated digital_pll clock after constraining clock to 150 MHz
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2021-11-15 15:50:43 +02:00 |
manarabdelaty
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bee7b4ed78
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Add initial config for the digital_pll
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2021-11-08 13:34:59 +02:00 |