12 Commits

Author	SHA1	Message	Date
passant5	9e1b6610d1	Merge pull request #234 from efabless/openlane-runs-config ... + add caravel_clocking & digital_pl & gpio_control_block openlane runs config.tcl file	2022-10-14 23:47:44 +02:00
kareem	ea6badcd67	+ add caravel_clocking & digital_pl & gpio_control_block openlane run config.tcl file	2022-10-14 14:28:47 -07:00
Passant	f69a522f19	update script to get the signoff sdc from directory `./signoff/<design name>/<design name>.sdc`	2022-10-14 13:57:16 -07:00
marwaneltoukhy	c83d7b6a52	changed paths of openlane signoff spef and sdfs	2022-10-13 09:11:54 -07:00
kareem	59743f4832	change buf16 to clkbuf16 and reimplement	2022-10-13 06:54:55 -07:00
kareem	0eed96f33f	reharden: digital_pll ... ~ reimplement digital_pll using updated RTL ~ changes in config to generate same PDN ~ change deprecated variables	2022-10-13 06:21:08 -07:00
Passant	78cec109cc	add signoff sdc dir ... move sdc generated from openlane to signoff/<design name>/openlane-signoff rearrange spef directory with RC corners spefs	2022-10-12 07:28:32 -07:00
manarabdelaty	966b1f22bb	[DATA] Update digital_pll	2021-12-07 13:19:02 +02:00
manarabdelaty	0067bd5b7c	[DATA] Update caravel_clocking/digital_pll/housekeeping	2021-12-02 21:09:43 +02:00
manarabdelaty	37a07e291b	[DATA] Update digital_pll pin placement to have it align with the HK	2021-11-19 01:28:40 +02:00
manarabdelaty	72b2c724c9	[DATA] Add views for caravel_clocking and updated digital_pll clock after constraining clock to 150 MHz	2021-11-15 15:50:43 +02:00
manarabdelaty	bee7b4ed78	Add initial config for the digital_pll	2021-11-08 13:34:59 +02:00