6525f02ff6
DRC error (remove C_X_x, corner transistors).
2006-10-25 10:03:55 +00:00
da4c45aacc
Adding rf2lib to the MBK_CATA_LIB.
2006-10-05 10:09:25 +00:00
8460c02f06
nck must be "inout" and not "out".
2006-10-04 12:02:56 +00:00
f633afac72
Make OCR compile on intel mac with gcc 4 : PRIO_MAX seems to be a macro defined elsewhere.
2006-07-03 17:43:34 +00:00
785e1164c9
* sea/src/DEF_actions.c :
...
- It seems that the new DEF format (rev. 5.4) no longer repeats the
default VIAs. So we have to load them by hand directly inside the
parser.
* sea/src/util_Floorplan.c :
- Uses "aluX" instead of "l_aluX" for SE grid references.
2006-06-28 13:25:07 +00:00
ac7eb8d289
* ./alliance/src/cells/src/romlib/ :
...
- Updated to latest Alain Greiner version.
2006-06-07 19:20:05 +00:00
4a382f312a
minor bug in PCon creation
2006-05-24 13:34:21 +00:00
90cbee404a
version bison
2006-05-04 17:13:25 +00:00
b9d51da541
Allowing more than 64 chars filenames ....
2006-05-04 16:29:52 +00:00
06baca7072
* nero/src/ :
...
- Removing annoying debug message.
2006-04-28 07:51:54 +00:00
ca05a0811f
* Bug : when merging terminals, now uses the lowest index instead of
...
the latest. This avoid to be out of bound.
2006-04-12 16:33:00 +00:00
80f6732cea
Latest rom cells by A. Greiner.
2006-04-12 13:56:38 +00:00
a2f5a457f5
Bug Correction
...
vss] replaced by vss
2006-04-10 09:13:52 +00:00
90aeb41c1e
New version with user provided connectors
2006-03-30 19:07:47 +00:00
1b519c1142
* gcc4 compatible : no cast like (Foo*)bar=foo; use bar=(Bar*)foo;
...
* ALLIANCE_CFLAGS not added anymore to CFLAGS or CXXFLAGS
by alliance.m4 -> must be added explicitely in each
Makefile.am
* remove configure.in (generated by autostuff)
2006-03-29 17:11:09 +00:00
3c20c0416a
orthography
2006-03-25 19:17:44 +00:00
dfb13cb7de
Bug coorection in Pad verification : pModel wasn't reassigned !
...
Now using pIns->model !
2006-01-05 16:45:27 +00:00
61824315e8
enables a empty abox for preplacement ...
2005-12-16 15:33:18 +00:00
6352ba5a46
libtool ...
2005-12-15 14:02:55 +00:00
5f57d53787
use 1/2 lambda wire
2005-12-05 13:59:38 +00:00
1f632cd1e2
reordre padlib pxlib
2005-11-08 10:23:34 +00:00
41b1b8936a
padreal missing
2005-11-08 10:13:51 +00:00
8c90fc0a96
bug correction
2005-11-08 10:02:19 +00:00
3cace04606
back to the older version, incorrect...
2005-11-08 10:00:26 +00:00
e001427c43
pb on pck
2005-11-07 14:50:37 +00:00
3aa0c67e06
clock driver. not tested.
2005-11-07 08:46:29 +00:00
9e7c59db7f
Solve the "bug" of missing VIAs around pad terminals. This was not really
...
a bug : the VIAs where too close of each others in ALU4,ALU5 nero discarting
silently one of them. With this modification we no longer respect the double
pitch for upper layers at the edge of the routing grid.
2005-10-18 09:17:30 +00:00
c62a2afedc
What a lot of bugs corrected. That's amazing.
...
Don't say more.
2005-10-17 23:11:06 +00:00
a2c50f2196
// is not # :-)
2005-10-14 14:56:04 +00:00
2f28eb3d93
ALU4 ALU5 ALU6 have the same design rules than ALU2
2005-10-14 14:41:11 +00:00
f460fc3511
Many bug corrections for the chip.
2005-10-13 12:44:40 +00:00
3d3f207c17
pad name connector problem.
2005-10-13 07:50:52 +00:00
1e86562930
connector names differ between ap and vbe
2005-10-13 07:33:42 +00:00
77ab044a0c
Pad connector was missing for those cells. done.
2005-10-12 15:02:45 +00:00
11e6b1d04c
oups vddi vssi was connected.
2005-10-12 10:13:19 +00:00
0b4cf7bc74
a single an unconnected connector t was not erased. done.
2005-10-12 09:03:45 +00:00
b5b9ccfe1a
graal and dreal didnot have the same color for the same layer.
2005-10-11 11:26:37 +00:00
10d3e03cc1
Add cont_via4, cont_via5, ... and remove few bugs. Note that cmos.graal allows the user
...
to add ALU7 and ALU8 but these layers is not defined in cmos.rds yet.
2005-10-11 11:09:48 +00:00
df61214b5b
big via CONT_VIA4 and CONT_VIA5 was not well defined, so was not used yet !
2005-10-11 10:00:33 +00:00
8a15ad8e4d
Previous version did not have transistors inside, the new one have, but not clock repeater yet.
...
generic timing values in vbe model are not modified but will be in a near future.
2005-10-11 09:40:30 +00:00
d71d74e1d8
Removed debug printing...
2005-10-10 15:55:45 +00:00
2806047b85
NeRo is now able to route a full chip.
...
Plus some goodies for Graham Petley.
2005-10-10 15:34:06 +00:00
7b7fb1015a
Bug: host target for SLA4x is do, not tsunami...
2005-10-04 16:20:38 +00:00
1d9eac35e8
Added path to pxlib in MBK_CATA_LIB.
2005-10-04 16:01:47 +00:00
a1956a3066
Forgot again.
2005-10-04 15:54:57 +00:00
fe26476c70
Integrating pxlib into alliance distribution.
2005-10-04 15:46:25 +00:00
51c5346363
New pad library compliant with SxLib gauge.
...
Imported by jpc on behalf of F. Wajburt.
2005-10-04 15:39:03 +00:00
3ff97c3b56
Forgotten SLA4x config variables.
2005-10-03 14:53:16 +00:00
6532dc1bc0
Added support for SLA4x.
2005-10-03 14:44:41 +00:00
972ad39ca7
Error in documentation on SY_RM and SY_RP
2005-08-31 14:16:51 +00:00
Jean-Paul Chaput
Hugo Clement