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New pad library compliant with SxLib gauge. 

Imported by jpc on behalf of F. Wajburt.
This commit is contained in:
Jean-Paul Chaput 2005-10-04 15:39:03 +00:00
parent 3ff97c3b56
commit 51c5346363
27 changed files with 857 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
alliance/src/cells/src/pxlib/CATAL Normal file
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pck_px C
piot_px C
pi_px C
po_px C
pot_px C
pvddeck_px C
pvdde_px C
pvddick_px C
pvddi_px C
pvsseck_px C
pvsse_px C
pvssick_px C
pvssi_px C

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alliance/src/cells/src/pxlib/pck_px.ap Normal file
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V ALLIANCE : 6
H pck_px,P,14/ 9/2005,100
A 0,0,20000,40000
S 500,2000,19500,2000,500,ck,RIGHT,CALU3
S 500,3500,19500,3500,1200,vssi,LEFT,CALU3
S 500,5000,19500,5000,1200,vddi,LEFT,CALU3
S 500,6500,19500,6500,1200,vssi,RIGHT,CALU3
S 500,8000,19500,8000,1200,vddi,LEFT,CALU3
S 500,9500,19500,9500,1200,vsse,LEFT,CALU3
S 500,11000,19500,11000,1200,vdde,LEFT,CALU3
S 500,12500,19500,12500,1200,vsse,LEFT,CALU3
S 500,14000,19500,14000,1200,vdde,LEFT,CALU3
S 500,15500,19500,15500,1200,vsse,LEFT,CALU3
S 500,17000,19500,17000,1200,vdde,LEFT,CALU3
S 500,18500,19500,18500,1200,vsse,LEFT,CALU3
S 10000,24000,10000,36000,12200,pad,DOWN,CALU1
EOF

29
alliance/src/cells/src/pxlib/pck_px.vbe Normal file
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ENTITY pck_px IS
GENERIC (
CONSTANT area : NATURAL := 80000;
CONSTANT cin_pad : NATURAL := 1326;
CONSTANT tpll_pad : NATURAL := 1443;
CONSTANT rdown_pad : NATURAL := 58;
CONSTANT tphh_pad : NATURAL := 228;
CONSTANT rup_pad : NATURAL := 68
);
PORT (
pad : in BIT;
ck : out BIT;
vdde : in BIT;
vddi : in BIT;
vsse : in BIT;
vssi : in BIT
);
END pck_px;
ARCHITECTURE behaviour_data_flow OF pck_px IS
BEGIN
ck <= pad;
ASSERT ((((vddi and vdde) and not (vssi)) and not (vsse)) = '1')
REPORT "power supply is missing on pck_px"
SEVERITY WARNING;
END;

20
alliance/src/cells/src/pxlib/pi_px.ap Normal file
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V ALLIANCE : 6
H pi_px,P,14/ 9/2005,100
A 0,0,20000,40000
S 3000,0,3000,0,200,t,LEFT,CALU3
S 3000,0,3000,0,200,t,LEFT,CALU2
S 10000,24000,10000,36000,12200,pad,DOWN,CALU1
S 500,18500,19500,18500,1200,vsse,LEFT,CALU3
S 500,17000,19500,17000,1200,vdde,LEFT,CALU3
S 500,15500,19500,15500,1200,vsse,LEFT,CALU3
S 500,14000,19500,14000,1200,vdde,LEFT,CALU3
S 500,12500,19500,12500,1200,vsse,LEFT,CALU3
S 500,11000,19500,11000,1200,vdde,LEFT,CALU3
S 500,9500,19500,9500,1200,vsse,LEFT,CALU3
S 500,8000,19500,8000,1200,vddi,LEFT,CALU3
S 500,6500,19500,6500,1200,vssi,RIGHT,CALU3
S 500,5000,19500,5000,1200,vddi,LEFT,CALU3
S 500,3500,19500,3500,1200,vssi,LEFT,CALU3
S 500,2000,19500,2000,500,ck,RIGHT,CALU3
V 3000,0,CONT_VIA2,*
EOF

30
alliance/src/cells/src/pxlib/pi_px.vbe Normal file
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ENTITY pi_px IS
GENERIC (
CONSTANT area : NATURAL := 80000;
CONSTANT cin_pad : NATURAL := 654;
CONSTANT tpll_pad : NATURAL := 1487;
CONSTANT rdown_pad : NATURAL := 234;
CONSTANT tphh_pad : NATURAL := 233;
CONSTANT rup_pad : NATURAL := 273
);
PORT (
pad : in BIT;
t : out BIT;
ck : in BIT;
vdde : in BIT;
vddi : in BIT;
vsse : in BIT;
vssi : in BIT
);
END pi_px;
ARCHITECTURE behaviour_data_flow OF pi_px IS
BEGIN
t <= pad;
ASSERT ((((vddi and vdde) and not (vssi)) and not (vsse)) = '1')
REPORT "power supply is missing on pi_px"
SEVERITY WARNING;
END;

26
alliance/src/cells/src/pxlib/piot_px.ap Normal file
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V ALLIANCE : 6
H piot_px,P,14/ 9/2005,100
A 0,0,20000,40000
S 500,2000,19500,2000,500,ck,RIGHT,CALU3
S 500,3500,19500,3500,1200,vssi,LEFT,CALU3
S 500,5000,19500,5000,1200,vddi,LEFT,CALU3
S 500,6500,19500,6500,1200,vssi,RIGHT,CALU3
S 500,8000,19500,8000,1200,vddi,LEFT,CALU3
S 500,9500,19500,9500,1200,vsse,LEFT,CALU3
S 500,11000,19500,11000,1200,vdde,LEFT,CALU3
S 500,12500,19500,12500,1200,vsse,LEFT,CALU3
S 500,14000,19500,14000,1200,vdde,LEFT,CALU3
S 500,15500,19500,15500,1200,vsse,LEFT,CALU3
S 500,17000,19500,17000,1200,vdde,LEFT,CALU3
S 500,18500,19500,18500,1200,vsse,LEFT,CALU3
S 10000,24000,10000,36000,12200,pad,DOWN,CALU1
S 3000,0,3000,0,200,t,LEFT,CALU2
S 3000,0,3000,0,200,t,LEFT,CALU3
S 15000,0,15000,0,200,i,LEFT,CALU3
S 15000,0,15000,0,200,i,LEFT,CALU2
S 16000,0,16000,0,200,b,LEFT,CALU3
S 16000,0,16000,0,200,b,LEFT,CALU2
V 3000,0,CONT_VIA2,*
V 15000,0,CONT_VIA2,*
V 16000,0,CONT_VIA2,*
EOF

44
alliance/src/cells/src/pxlib/piot_px.vbe Normal file
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ENTITY piot_px IS
GENERIC (
CONSTANT area : NATURAL := 80000;
CONSTANT rup : NATURAL := 402;
CONSTANT rdown : NATURAL := 0
);
PORT (
i : in BIT;
b : in BIT;
t : out BIT;
pad : inout MUX_BIT BUS;
ck : in BIT;
vdde : in BIT;
vddi : in BIT;
vsse : in BIT;
vssi : in BIT
);
END piot_px;
ARCHITECTURE behaviour_data_flow OF piot_px IS
SIGNAL b1 : BIT;
SIGNAL b2 : BIT;
SIGNAL b3 : BIT;
SIGNAL b4 : BIT;
SIGNAL b5 : BIT;
SIGNAL b6 : BIT;
BEGIN
b6 <= b5;
b5 <= b4;
b4 <= b3;
b3 <= b2;
b2 <= b1;
b1 <= b;
label0 : BLOCK (b6 = '1')
BEGIN
pad <= GUARDED i;
END BLOCK label0;
t <= pad;
ASSERT ((((vddi and vdde) and not (vssi)) and not (vsse)) = '1')
REPORT "power supply is missing on piot_px"
SEVERITY WARNING;
END;

20
alliance/src/cells/src/pxlib/po_px.ap Normal file
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V ALLIANCE : 6
H po_px,P,14/ 9/2005,100
A 0,0,20000,40000
S 500,2000,19500,2000,500,ck,RIGHT,CALU3
S 500,3500,19500,3500,1200,vssi,LEFT,CALU3
S 500,5000,19500,5000,1200,vddi,LEFT,CALU3
S 500,6500,19500,6500,1200,vssi,RIGHT,CALU3
S 500,8000,19500,8000,1200,vddi,LEFT,CALU3
S 500,9500,19500,9500,1200,vsse,LEFT,CALU3
S 500,11000,19500,11000,1200,vdde,LEFT,CALU3
S 500,12500,19500,12500,1200,vsse,LEFT,CALU3
S 500,14000,19500,14000,1200,vdde,LEFT,CALU3
S 500,15500,19500,15500,1200,vsse,LEFT,CALU3
S 500,17000,19500,17000,1200,vdde,LEFT,CALU3
S 500,18500,19500,18500,1200,vsse,LEFT,CALU3
S 10000,24000,10000,36000,12200,pad,DOWN,CALU1
S 15000,0,15000,0,200,i,LEFT,CALU3
S 15000,0,15000,0,200,i,LEFT,CALU2
V 15000,0,CONT_VIA2,*
EOF

29
alliance/src/cells/src/pxlib/po_px.vbe Normal file
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ENTITY po_px IS
GENERIC (
CONSTANT area : NATURAL := 80000;
CONSTANT cin_i : NATURAL := 191;
CONSTANT tpll_i : NATURAL := 2176;
CONSTANT rdown_i : NATURAL := 15;
CONSTANT tphh_i : NATURAL := 2032;
CONSTANT rup_i : NATURAL := 16
);
PORT (
i : in BIT;
pad : out BIT;
ck : in BIT;
vdde : in BIT;
vddi : in BIT;
vsse : in BIT;
vssi : in BIT
);
END po_px;
ARCHITECTURE behaviour_data_flow OF po_px IS
BEGIN
pad <= i;
ASSERT ((((vddi and vdde) and not (vssi)) and not (vsse)) = '1')
REPORT "power supply is missing on po_px"
SEVERITY WARNING;
END;

23
alliance/src/cells/src/pxlib/pot_px.ap Normal file
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V ALLIANCE : 6
H pot_px,P,14/ 9/2005,100
A 0,0,20000,40000
S 500,2000,19500,2000,500,ck,RIGHT,CALU3
S 500,3500,19500,3500,1200,vssi,LEFT,CALU3
S 500,5000,19500,5000,1200,vddi,LEFT,CALU3
S 500,6500,19500,6500,1200,vssi,RIGHT,CALU3
S 500,8000,19500,8000,1200,vddi,LEFT,CALU3
S 500,9500,19500,9500,1200,vsse,LEFT,CALU3
S 500,11000,19500,11000,1200,vdde,LEFT,CALU3
S 500,12500,19500,12500,1200,vsse,LEFT,CALU3
S 500,14000,19500,14000,1200,vdde,LEFT,CALU3
S 500,15500,19500,15500,1200,vsse,LEFT,CALU3
S 500,17000,19500,17000,1200,vdde,LEFT,CALU3
S 500,18500,19500,18500,1200,vsse,LEFT,CALU3
S 10000,24000,10000,36000,12200,pad,DOWN,CALU1
S 15000,0,15000,0,200,i,LEFT,CALU3
S 15000,0,15000,0,200,i,LEFT,CALU2
S 16000,0,16000,0,200,b,LEFT,CALU3
S 16000,0,16000,0,200,b,LEFT,CALU2
V 15000,0,CONT_VIA2,*
V 16000,0,CONT_VIA2,*
EOF

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alliance/src/cells/src/pxlib/pot_px.vbe Normal file
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ENTITY pot_px IS
GENERIC (
CONSTANT area : NATURAL := 80000;
CONSTANT rup : NATURAL := 684404;
CONSTANT rdown : NATURAL := 24
);
PORT (
i : in BIT;
b : in BIT;
pad : out MUX_BIT BUS;
ck : in BIT;
vdde : in BIT;
vddi : in BIT;
vsse : in BIT;
vssi : in BIT
);
END pot_px;
ARCHITECTURE behaviour_data_flow OF pot_px IS
SIGNAL b1 : BIT;
SIGNAL b2 : BIT;
SIGNAL b3 : BIT;
SIGNAL b4 : BIT;
SIGNAL b5 : BIT;
SIGNAL b6 : BIT;
BEGIN
b6 <= b5;
b5 <= b4;
b4 <= b3;
b3 <= b2;
b2 <= b1;
b1 <= b;
label0 : BLOCK (b6 = '1')
BEGIN
pad <= GUARDED i;
END BLOCK label0;
ASSERT ((((vddi and vdde) and not (vssi)) and not (vsse)) = '1')
REPORT "power supply is missing on pot_px"
SEVERITY WARNING;
END;

44
alliance/src/cells/src/pxlib/pvdde_px.ap Normal file
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V ALLIANCE : 6
H pvdde_px,P,14/ 9/2005,100
A 0,0,20000,40000
S 17000,0,17000,1000,1200,vddi,UP,CALU3
S 6000,0,6000,1000,1200,vddi,UP,CALU3
S 14000,0,14000,1000,1200,vssi,UP,CALU3
S 3000,0,3000,1000,1200,vssi,UP,CALU3
S 10000,24000,10000,36000,12200,vdde,DOWN,CALU1
S 10000,3000,10000,30000,5200,*,DOWN,ALU1
S 14000,0,14000,8500,1200,vssi,UP,CALU2
S 17000,0,17000,8500,1200,vddi,UP,CALU2
S 3000,0,3000,8500,1200,vssi,UP,CALU2
S 6000,0,6000,8500,1200,vddi,UP,CALU2
S 500,2000,19500,2000,500,ck,RIGHT,CALU3
S 500,3500,19500,3500,1200,vssi,LEFT,CALU3
S 500,5000,19500,5000,1200,vddi,LEFT,CALU3
S 500,6500,19500,6500,1200,vssi,RIGHT,CALU3
S 500,8000,19500,8000,1200,vddi,LEFT,CALU3
S 500,9500,19500,9500,1200,vsse,LEFT,CALU3
S 500,11000,19500,11000,1200,vdde,LEFT,CALU3
S 500,12500,19500,12500,1200,vsse,LEFT,CALU3
S 500,14000,19500,14000,1200,vdde,LEFT,CALU3
S 500,15500,19500,15500,1200,vsse,LEFT,CALU3
S 500,17000,19500,17000,1200,vdde,LEFT,CALU3
S 500,18500,19500,18500,1200,vsse,LEFT,CALU3
B 10000,17000,5200,1200,CONT_VIA,*
B 10000,17000,5200,1200,CONT_VIA2,*
B 10000,14000,5200,1200,CONT_VIA,*
B 10000,11000,5200,1200,CONT_VIA,*
B 10000,11000,5200,1200,CONT_VIA2,*
B 10000,14000,5200,1200,CONT_VIA2,*
B 14000,500,1200,1200,CONT_VIA2,*
B 17000,500,1200,1200,CONT_VIA2,*
B 14000,6500,1200,1200,CONT_VIA2,*
B 14000,3500,1200,1200,CONT_VIA2,*
B 17000,5000,1200,1200,CONT_VIA2,*
B 17000,8000,1200,1200,CONT_VIA2,*
B 3000,500,1200,1200,CONT_VIA2,*
B 6000,500,1200,1200,CONT_VIA2,*
B 6000,8000,1200,1200,CONT_VIA2,*
B 6000,5000,1200,1200,CONT_VIA2,*
B 3000,6500,1200,1200,CONT_VIA2,*
B 3000,3500,1200,1200,CONT_VIA2,*
EOF

20
alliance/src/cells/src/pxlib/pvdde_px.vbe Normal file
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ENTITY pvdde_px IS
GENERIC (
CONSTANT area : NATURAL := 80000
);
PORT (
ck : in BIT;
vdde : in BIT;
vddi : in BIT;
vsse : in BIT;
vssi : in BIT
);
END pvdde_px;
ARCHITECTURE behaviour_data_flow OF pvdde_px IS
BEGIN
ASSERT ((((not (vssi) and not (vsse)) and vddi) and vdde) = '1')
REPORT "power supply is missing on pvdde_px"
SEVERITY WARNING;
END;

47
alliance/src/cells/src/pxlib/pvddeck_px.ap Normal file
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V ALLIANCE : 6
H pvddeck_px,P,14/ 9/2005,100
A 0,0,20000,40000
S 500,6500,19500,6500,1200,vssi,RIGHT,CALU3
S 500,8000,19500,8000,1200,vddi,LEFT,CALU3
S 500,18500,19500,18500,1200,vsse,LEFT,CALU3
S 500,3500,19500,3500,1200,vssi,LEFT,CALU3
S 500,5000,19500,5000,1200,vddi,LEFT,CALU3
S 500,17000,19500,17000,1200,vdde,LEFT,CALU3
S 500,14000,19500,14000,1200,vdde,LEFT,CALU3
S 500,11000,19500,11000,1200,vdde,LEFT,CALU3
S 500,15500,19500,15500,1200,vsse,LEFT,CALU3
S 500,12500,19500,12500,1200,vsse,LEFT,CALU3
S 500,9500,19500,9500,1200,vsse,LEFT,CALU3
S 14000,0,14000,1000,1200,vssi,UP,CALU3
S 17000,0,17000,1000,1200,vddi,UP,CALU3
S 6000,0,6000,1000,1200,vddi,UP,CALU3
S 3000,0,3000,1000,1200,vssi,UP,CALU3
S 500,2000,19500,2000,500,ck,RIGHT,CALU3
S 6000,0,6000,8500,1200,vddi,UP,CALU2
S 3000,0,3000,8500,1200,vssi,UP,CALU2
S 17000,0,17000,8500,1200,vddi,UP,CALU2
S 14000,0,14000,8500,1200,vssi,UP,CALU2
S 10000,3000,10000,30000,5200,*,DOWN,ALU1
S 10000,24000,10000,36000,12200,vdde,DOWN,CALU1
S 10000,0,10000,1000,1200,cko,UP,CALU3
S 10000,0,10000,1000,1200,cko,UP,CALU2
B 10000,17000,5200,1200,CONT_VIA,*
B 10000,17000,5200,1200,CONT_VIA2,*
B 10000,14000,5200,1200,CONT_VIA,*
B 10000,14000,5200,1200,CONT_VIA2,*
B 10000,11000,5200,1200,CONT_VIA,*
B 10000,11000,5200,1200,CONT_VIA2,*
B 17000,8000,1200,1200,CONT_VIA2,*
B 14000,6500,1200,1200,CONT_VIA2,*
B 17000,5000,1200,1200,CONT_VIA2,*
B 14000,3500,1200,1200,CONT_VIA2,*
B 6000,8000,1200,1200,CONT_VIA2,*
B 3000,6500,1200,1200,CONT_VIA2,*
B 6000,5000,1200,1200,CONT_VIA2,*
B 3000,3500,1200,1200,CONT_VIA2,*
B 6000,500,1200,1200,CONT_VIA2,*
B 3000,500,1200,1200,CONT_VIA2,*
B 17000,500,1200,1200,CONT_VIA2,*
B 14000,500,1200,1200,CONT_VIA2,*
B 10000,500,1200,1200,CONT_VIA2,*
EOF

31
alliance/src/cells/src/pxlib/pvddeck_px.vbe Normal file
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ENTITY pvddeck_px IS
GENERIC (
CONSTANT area : NATURAL := 80000;
CONSTANT cin_ck : NATURAL := 127;
CONSTANT tpll_ck : NATURAL := 1055;
CONSTANT rdown_ck : NATURAL := 126;
CONSTANT tphh_ck : NATURAL := 963;
CONSTANT rup_ck : NATURAL := 183
);
PORT (
cko : out WOR_BIT BUS;
ck : in BIT;
vdde : in BIT;
vddi : in BIT;
vsse : in BIT;
vssi : in BIT
);
END pvddeck_px;
ARCHITECTURE behaviour_data_flow OF pvddeck_px IS
BEGIN
label0 : BLOCK ('1' = '1')
BEGIN
cko <= GUARDED ck;
END BLOCK label0;
ASSERT ((((not (vssi) and not (vsse)) and vddi) and vdde) = '1')
REPORT "power supply is missing on pvddeck_px"
SEVERITY WARNING;
END;

42
alliance/src/cells/src/pxlib/pvddi_px.ap Normal file
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@ -0,0 +1,42 @@
V ALLIANCE : 6
H pvddi_px,P,14/ 9/2005,100
A 0,0,20000,40000
S 17000,0,17000,1000,1200,vddi,UP,CALU3
S 14000,0,14000,1000,1200,vssi,UP,CALU3
S 6000,0,6000,1000,1200,vddi,UP,CALU3
S 3000,0,3000,1000,1200,vssi,UP,CALU3
S 500,8000,19500,8000,1200,vddi,LEFT,CALU3
S 500,6500,19500,6500,1200,vssi,RIGHT,CALU3
S 500,5000,19500,5000,1200,vddi,LEFT,CALU3
S 500,3500,19500,3500,1200,vssi,LEFT,CALU3
S 500,9500,19500,9500,1200,vsse,LEFT,CALU3
S 500,12500,19500,12500,1200,vsse,LEFT,CALU3
S 500,15500,19500,15500,1200,vsse,LEFT,CALU3
S 500,11000,19500,11000,1200,vdde,LEFT,CALU3
S 500,14000,19500,14000,1200,vdde,LEFT,CALU3
S 500,17000,19500,17000,1200,vdde,LEFT,CALU3
S 500,18500,19500,18500,1200,vsse,LEFT,CALU3
S 10000,3000,10000,30000,5200,*,DOWN,ALU1
S 14000,0,14000,8500,1200,vssi,UP,CALU2
S 17000,0,17000,8500,1200,vddi,UP,CALU2
S 3000,0,3000,8500,1200,vssi,UP,CALU2
S 6000,0,6000,8500,1200,vddi,UP,CALU2
S 500,2000,19500,2000,500,ck,RIGHT,CALU3
S 10000,24000,10000,36000,12200,vddi,DOWN,CALU1
B 10000,5000,5200,1200,CONT_VIA,*
B 10000,8000,5200,1200,CONT_VIA2,*
B 10000,5000,5200,1200,CONT_VIA2,*
B 10000,8000,5200,1200,CONT_VIA,*
B 14000,500,1200,1200,CONT_VIA2,*
B 17000,500,1200,1200,CONT_VIA2,*
B 14000,6500,1200,1200,CONT_VIA2,*
B 14000,3500,1200,1200,CONT_VIA2,*
B 17000,5000,1200,1200,CONT_VIA2,*
B 17000,8000,1200,1200,CONT_VIA2,*
B 3000,500,1200,1200,CONT_VIA2,*
B 6000,500,1200,1200,CONT_VIA2,*
B 6000,8000,1200,1200,CONT_VIA2,*
B 6000,5000,1200,1200,CONT_VIA2,*
B 3000,6500,1200,1200,CONT_VIA2,*
B 3000,3500,1200,1200,CONT_VIA2,*
EOF

20
alliance/src/cells/src/pxlib/pvddi_px.vbe Normal file
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ENTITY pvddi_px IS
GENERIC (
CONSTANT area : NATURAL := 80000
);
PORT (
ck : in BIT;
vdde : in BIT;
vddi : in BIT;
vsse : in BIT;
vssi : in BIT
);
END pvddi_px;
ARCHITECTURE behaviour_data_flow OF pvddi_px IS
BEGIN
ASSERT ((((vddi and vdde) and not (vssi)) and not (vsse)) = '1')
REPORT "power supply is missing on pvddi_px"
SEVERITY WARNING;
END;

45
alliance/src/cells/src/pxlib/pvddick_px.ap Normal file
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@ -0,0 +1,45 @@
V ALLIANCE : 6
H pvddick_px,P,14/ 9/2005,100
A 0,0,20000,40000
S 10000,0,10000,1000,1200,cko,UP,CALU2
S 10000,0,10000,1000,1200,cko,UP,CALU3
S 17000,0,17000,1000,1200,vddi,UP,CALU3
S 14000,0,14000,1000,1200,vssi,UP,CALU3
S 6000,0,6000,1000,1200,vddi,UP,CALU3
S 3000,0,3000,1000,1200,vssi,UP,CALU3
S 500,8000,19500,8000,1200,vddi,LEFT,CALU3
S 500,6500,19500,6500,1200,vssi,RIGHT,CALU3
S 500,5000,19500,5000,1200,vddi,LEFT,CALU3
S 500,3500,19500,3500,1200,vssi,LEFT,CALU3
S 500,9500,19500,9500,1200,vsse,LEFT,CALU3
S 500,12500,19500,12500,1200,vsse,LEFT,CALU3
S 500,15500,19500,15500,1200,vsse,LEFT,CALU3
S 500,11000,19500,11000,1200,vdde,LEFT,CALU3
S 500,14000,19500,14000,1200,vdde,LEFT,CALU3
S 500,17000,19500,17000,1200,vdde,LEFT,CALU3
S 500,18500,19500,18500,1200,vsse,LEFT,CALU3
S 10000,3000,10000,30000,5200,*,DOWN,ALU1
S 14000,0,14000,8500,1200,vssi,UP,CALU2
S 17000,0,17000,8500,1200,vddi,UP,CALU2
S 3000,0,3000,8500,1200,vssi,UP,CALU2
S 6000,0,6000,8500,1200,vddi,UP,CALU2
S 500,2000,19500,2000,500,ck,RIGHT,CALU3
S 10000,24000,10000,36000,12200,vddi,DOWN,CALU1
B 10000,500,1200,1200,CONT_VIA2,*
B 10000,5000,5200,1200,CONT_VIA,*
B 10000,8000,5200,1200,CONT_VIA2,*
B 10000,5000,5200,1200,CONT_VIA2,*
B 10000,8000,5200,1200,CONT_VIA,*
B 14000,500,1200,1200,CONT_VIA2,*
B 17000,500,1200,1200,CONT_VIA2,*
B 14000,6500,1200,1200,CONT_VIA2,*
B 14000,3500,1200,1200,CONT_VIA2,*
B 17000,5000,1200,1200,CONT_VIA2,*
B 17000,8000,1200,1200,CONT_VIA2,*
B 3000,500,1200,1200,CONT_VIA2,*
B 6000,500,1200,1200,CONT_VIA2,*
B 6000,8000,1200,1200,CONT_VIA2,*
B 6000,5000,1200,1200,CONT_VIA2,*
B 3000,6500,1200,1200,CONT_VIA2,*
B 3000,3500,1200,1200,CONT_VIA2,*
EOF

31
alliance/src/cells/src/pxlib/pvddick_px.vbe Normal file
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ENTITY pvddick_px IS
GENERIC (
CONSTANT area : NATURAL := 80000;
CONSTANT cin_ck : NATURAL := 127;
CONSTANT tpll_ck : NATURAL := 1235;
CONSTANT rdown_ck : NATURAL := 253;
CONSTANT tphh_ck : NATURAL := 1109;
CONSTANT rup_ck : NATURAL := 311
);
PORT (
cko : out WOR_BIT BUS;
ck : in BIT;
vdde : in BIT;
vddi : in BIT;
vsse : in BIT;
vssi : in BIT
);
END pvddick_px;
ARCHITECTURE behaviour_data_flow OF pvddick_px IS
BEGIN
label0 : BLOCK ('1' = '1')
BEGIN
cko <= GUARDED ck;
END BLOCK label0;
ASSERT ((((vddi and vdde) and not (vssi)) and not (vsse)) = '1')
REPORT "power supply is missing on pvddick_px"
SEVERITY WARNING;
END;

46
alliance/src/cells/src/pxlib/pvsse_px.ap Normal file
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V ALLIANCE : 6
H pvsse_px,P,14/ 9/2005,100
A 0,0,20000,40000
S 500,3500,19500,3500,1200,vssi,LEFT,CALU3
S 500,5000,19500,5000,1200,vddi,LEFT,CALU3
S 500,6500,19500,6500,1200,vssi,RIGHT,CALU3
S 500,8000,19500,8000,1200,vddi,LEFT,CALU3
S 500,9500,19500,9500,1200,vsse,LEFT,CALU3
S 500,11000,19500,11000,1200,vdde,LEFT,CALU3
S 500,12500,19500,12500,1200,vsse,LEFT,CALU3
S 500,14000,19500,14000,1200,vdde,LEFT,CALU3
S 500,18500,19500,18500,1200,vsse,LEFT,CALU3
S 500,17000,19500,17000,1200,vdde,LEFT,CALU3
S 500,15500,19500,15500,1200,vsse,LEFT,CALU3
S 17000,0,17000,1000,1200,vddi,UP,CALU3
S 6000,0,6000,1000,1200,vddi,UP,CALU3
S 14000,0,14000,1000,1200,vssi,UP,CALU3
S 3000,0,3000,1000,1200,vssi,UP,CALU3
S 500,2000,19500,2000,500,ck,RIGHT,CALU3
S 6000,0,6000,8500,1200,vddi,UP,CALU2
S 3000,0,3000,8500,1200,vssi,UP,CALU2
S 17000,0,17000,8500,1200,vddi,UP,CALU2
S 14000,0,14000,8500,1200,vssi,UP,CALU2
S 10000,3000,10000,30000,5200,*,DOWN,ALU1
S 10000,24000,10000,36000,12200,vsse,DOWN,CALU1
B 3000,3500,1200,1200,CONT_VIA2,*
B 3000,6500,1200,1200,CONT_VIA2,*
B 6000,5000,1200,1200,CONT_VIA2,*
B 6000,8000,1200,1200,CONT_VIA2,*
B 6000,500,1200,1200,CONT_VIA2,*
B 3000,500,1200,1200,CONT_VIA2,*
B 17000,8000,1200,1200,CONT_VIA2,*
B 17000,5000,1200,1200,CONT_VIA2,*
B 14000,3500,1200,1200,CONT_VIA2,*
B 14000,6500,1200,1200,CONT_VIA2,*
B 17000,500,1200,1200,CONT_VIA2,*
B 14000,500,1200,1200,CONT_VIA2,*
B 10000,15500,5200,1200,CONT_VIA2,*
B 10000,12500,5200,1200,CONT_VIA2,*
B 10000,18500,5200,1200,CONT_VIA2,*
B 10000,18500,5200,1200,CONT_VIA,*
B 10000,15500,5200,1200,CONT_VIA,*
B 10000,12500,5200,1200,CONT_VIA,*
B 10000,9500,5200,1200,CONT_VIA2,*
B 10000,9500,5200,1200,CONT_VIA,*
EOF

20
alliance/src/cells/src/pxlib/pvsse_px.vbe Normal file
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ENTITY pvsse_px IS
GENERIC (
CONSTANT area : NATURAL := 80000
);
PORT (
ck : in BIT;
vdde : in BIT;
vddi : in BIT;
vsse : in BIT;
vssi : in BIT
);
END pvsse_px;
ARCHITECTURE behaviour_data_flow OF pvsse_px IS
BEGIN
ASSERT ((((vddi and vdde) and not (vssi)) and not (vsse)) = '1')
REPORT "power supply is missing on pvsse_px"
SEVERITY WARNING;
END;

49
alliance/src/cells/src/pxlib/pvsseck_px.ap Normal file
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@ -0,0 +1,49 @@
V ALLIANCE : 6
H pvsseck_px,P,14/ 9/2005,100
A 0,0,20000,40000
S 10000,0,10000,1000,1200,cko,UP,CALU3
S 10000,0,10000,1000,1200,cko,UP,CALU2
S 10000,24000,10000,36000,12200,vsse,DOWN,CALU1
S 10000,3000,10000,30000,5200,*,DOWN,ALU1
S 14000,0,14000,8500,1200,vssi,UP,CALU2
S 17000,0,17000,8500,1200,vddi,UP,CALU2
S 3000,0,3000,8500,1200,vssi,UP,CALU2
S 6000,0,6000,8500,1200,vddi,UP,CALU2
S 500,2000,19500,2000,500,ck,RIGHT,CALU3
S 3000,0,3000,1000,1200,vssi,UP,CALU3
S 14000,0,14000,1000,1200,vssi,UP,CALU3
S 6000,0,6000,1000,1200,vddi,UP,CALU3
S 17000,0,17000,1000,1200,vddi,UP,CALU3
S 500,15500,19500,15500,1200,vsse,LEFT,CALU3
S 500,17000,19500,17000,1200,vdde,LEFT,CALU3
S 500,18500,19500,18500,1200,vsse,LEFT,CALU3
S 500,14000,19500,14000,1200,vdde,LEFT,CALU3
S 500,12500,19500,12500,1200,vsse,LEFT,CALU3
S 500,11000,19500,11000,1200,vdde,LEFT,CALU3
S 500,9500,19500,9500,1200,vsse,LEFT,CALU3
S 500,8000,19500,8000,1200,vddi,LEFT,CALU3
S 500,6500,19500,6500,1200,vssi,RIGHT,CALU3
S 500,5000,19500,5000,1200,vddi,LEFT,CALU3
S 500,3500,19500,3500,1200,vssi,LEFT,CALU3
B 10000,9500,5200,1200,CONT_VIA,*
B 10000,9500,5200,1200,CONT_VIA2,*
B 10000,12500,5200,1200,CONT_VIA,*
B 10000,15500,5200,1200,CONT_VIA,*
B 10000,18500,5200,1200,CONT_VIA,*
B 10000,18500,5200,1200,CONT_VIA2,*
B 10000,12500,5200,1200,CONT_VIA2,*
B 10000,15500,5200,1200,CONT_VIA2,*
B 14000,500,1200,1200,CONT_VIA2,*
B 17000,500,1200,1200,CONT_VIA2,*
B 14000,6500,1200,1200,CONT_VIA2,*
B 14000,3500,1200,1200,CONT_VIA2,*
B 17000,5000,1200,1200,CONT_VIA2,*
B 17000,8000,1200,1200,CONT_VIA2,*
B 3000,500,1200,1200,CONT_VIA2,*
B 6000,500,1200,1200,CONT_VIA2,*
B 6000,8000,1200,1200,CONT_VIA2,*
B 6000,5000,1200,1200,CONT_VIA2,*
B 3000,6500,1200,1200,CONT_VIA2,*
B 3000,3500,1200,1200,CONT_VIA2,*
B 10000,500,1200,1200,CONT_VIA,*
EOF

31
alliance/src/cells/src/pxlib/pvsseck_px.vbe Normal file
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ENTITY pvsseck_px IS
GENERIC (
CONSTANT area : NATURAL := 80000;
CONSTANT cin_ck : NATURAL := 127;
CONSTANT tpll_ck : NATURAL := 1055;
CONSTANT rdown_ck : NATURAL := 126;
CONSTANT tphh_ck : NATURAL := 963;
CONSTANT rup_ck : NATURAL := 183
);
PORT (
cko : out WOR_BIT BUS;
ck : in BIT;
vdde : in BIT;
vddi : in BIT;
vsse : in BIT;
vssi : in BIT
);
END pvsseck_px;
ARCHITECTURE behaviour_data_flow OF pvsseck_px IS
BEGIN
label0 : BLOCK ('1' = '1')
BEGIN
cko <= GUARDED ck;
END BLOCK label0;
ASSERT ((((vddi and vdde) and not (vssi)) and not (vsse)) = '1')
REPORT "power supply is missing on pvsseck_px"
SEVERITY WARNING;
END;

42
alliance/src/cells/src/pxlib/pvssi_px.ap Normal file
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V ALLIANCE : 6
H pvssi_px,P,14/ 9/2005,100
A 0,0,20000,40000
S 17000,0,17000,1000,1200,vddi,UP,CALU3
S 6000,0,6000,1000,1200,vddi,UP,CALU3
S 14000,0,14000,1000,1200,vssi,UP,CALU3
S 3000,0,3000,1000,1200,vssi,UP,CALU3
S 500,8000,19500,8000,1200,vddi,LEFT,CALU3
S 500,6500,19500,6500,1200,vssi,RIGHT,CALU3
S 500,5000,19500,5000,1200,vddi,LEFT,CALU3
S 500,3500,19500,3500,1200,vssi,LEFT,CALU3
S 500,18500,19500,18500,1200,vsse,LEFT,CALU3
S 500,17000,19500,17000,1200,vdde,LEFT,CALU3
S 500,14000,19500,14000,1200,vdde,LEFT,CALU3
S 500,11000,19500,11000,1200,vdde,LEFT,CALU3
S 500,15500,19500,15500,1200,vsse,LEFT,CALU3
S 500,12500,19500,12500,1200,vsse,LEFT,CALU3
S 500,9500,19500,9500,1200,vsse,LEFT,CALU3
S 500,2000,19500,2000,500,ck,RIGHT,CALU3
S 6000,0,6000,8500,1200,vddi,UP,CALU2
S 3000,0,3000,8500,1200,vssi,UP,CALU2
S 17000,0,17000,8500,1200,vddi,UP,CALU2
S 14000,0,14000,8500,1200,vssi,UP,CALU2
S 10000,3000,10000,30000,5200,*,DOWN,ALU1
S 10000,24000,10000,36000,12200,vssi,DOWN,CALU1
B 3000,3500,1200,1200,CONT_VIA2,*
B 3000,6500,1200,1200,CONT_VIA2,*
B 6000,5000,1200,1200,CONT_VIA2,*
B 6000,8000,1200,1200,CONT_VIA2,*
B 6000,500,1200,1200,CONT_VIA2,*
B 3000,500,1200,1200,CONT_VIA2,*
B 17000,8000,1200,1200,CONT_VIA2,*
B 17000,5000,1200,1200,CONT_VIA2,*
B 14000,3500,1200,1200,CONT_VIA2,*
B 14000,6500,1200,1200,CONT_VIA2,*
B 17000,500,1200,1200,CONT_VIA2,*
B 14000,500,1200,1200,CONT_VIA2,*
B 10000,6500,5200,1200,CONT_VIA2,*
B 10000,3500,5200,1200,CONT_VIA2,*
B 10000,3500,5200,1200,CONT_VIA,*
B 10000,6500,5200,1200,CONT_VIA,*
EOF

20
alliance/src/cells/src/pxlib/pvssi_px.vbe Normal file
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@ -0,0 +1,20 @@
ENTITY pvssi_px IS
GENERIC (
CONSTANT area : NATURAL := 80000
);
PORT (
ck : in BIT;
vdde : in BIT;
vddi : in BIT;
vsse : in BIT;
vssi : in BIT
);
END pvssi_px;
ARCHITECTURE behaviour_data_flow OF pvssi_px IS
BEGIN
ASSERT ((((vddi and vdde) and not (vssi)) and not (vsse)) = '1')
REPORT "power supply is missing on pvssi_px"
SEVERITY WARNING;
END;

44
alliance/src/cells/src/pxlib/pvssick_px.ap Normal file
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@ -0,0 +1,44 @@
V ALLIANCE : 6
H pvssick_px,P,14/ 9/2005,100
A 0,0,20000,40000
S 10000,0,10000,1000,1200,cko,UP,CALU3
S 10000,0,10000,1000,1200,cko,UP,CALU2
S 17000,0,17000,1000,1200,vddi,UP,CALU3
S 6000,0,6000,1000,1200,vddi,UP,CALU3
S 14000,0,14000,1000,1200,vssi,UP,CALU3
S 3000,0,3000,1000,1200,vssi,UP,CALU3
S 500,8000,19500,8000,1200,vddi,LEFT,CALU3
S 500,6500,19500,6500,1200,vssi,RIGHT,CALU3
S 500,5000,19500,5000,1200,vddi,LEFT,CALU3
S 500,3500,19500,3500,1200,vssi,LEFT,CALU3
S 500,18500,19500,18500,1200,vsse,LEFT,CALU3
S 500,17000,19500,17000,1200,vdde,LEFT,CALU3
S 500,14000,19500,14000,1200,vdde,LEFT,CALU3
S 500,11000,19500,11000,1200,vdde,LEFT,CALU3
S 500,15500,19500,15500,1200,vsse,LEFT,CALU3
S 500,12500,19500,12500,1200,vsse,LEFT,CALU3
S 500,9500,19500,9500,1200,vsse,LEFT,CALU3
S 500,2000,19500,2000,500,ck,RIGHT,CALU3
S 6000,0,6000,8500,1200,vddi,UP,CALU2
S 3000,0,3000,8500,1200,vssi,UP,CALU2
S 17000,0,17000,8500,1200,vddi,UP,CALU2
S 14000,0,14000,8500,1200,vssi,UP,CALU2
S 10000,3000,10000,30000,5200,*,DOWN,ALU1
S 10000,24000,10000,36000,12200,vssi,DOWN,CALU1
B 3000,3500,1200,1200,CONT_VIA2,*
B 3000,6500,1200,1200,CONT_VIA2,*
B 6000,5000,1200,1200,CONT_VIA2,*
B 6000,8000,1200,1200,CONT_VIA2,*
B 6000,500,1200,1200,CONT_VIA2,*
B 3000,500,1200,1200,CONT_VIA2,*
B 17000,8000,1200,1200,CONT_VIA2,*
B 17000,5000,1200,1200,CONT_VIA2,*
B 14000,3500,1200,1200,CONT_VIA2,*
B 14000,6500,1200,1200,CONT_VIA2,*
B 17000,500,1200,1200,CONT_VIA2,*
B 14000,500,1200,1200,CONT_VIA2,*
B 10000,6500,5200,1200,CONT_VIA2,*
B 10000,3500,5200,1200,CONT_VIA2,*
B 10000,3500,5200,1200,CONT_VIA,*
B 10000,6500,5200,1200,CONT_VIA,*
EOF

32
alliance/src/cells/src/pxlib/pvssick_px.vbe Normal file
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ENTITY pvssick_px IS
GENERIC (
CONSTANT area : NATURAL := 80000;
CONSTANT cin_ck : NATURAL := 127;
CONSTANT tpll_ck : NATURAL := 1235;
CONSTANT rdown_ck : NATURAL := 253;
CONSTANT tphh_ck : NATURAL := 1109;
CONSTANT rup_ck : NATURAL := 311
);
PORT (
cko : out WOR_BIT BUS;
ck : in BIT;
vdde : in BIT;
vddi : in BIT;
vsse : in BIT;
vssi : in BIT
);
END pvssick_px;
ARCHITECTURE behaviour_data_flow OF pvssick_px IS
BEGIN
label0 : BLOCK ('1' = '1')
BEGIN
cko <= GUARDED ck;
END BLOCK label0;
ASSERT ((((vddi and vdde) and not (vssi)) and not (vsse)) = '1')
REPORT "power supply is missing on pvssick_px"
SEVERITY WARNING;
END;